Design of Power Efficient FPGA based Hardware Accelerators for Financial Applications

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Using Field Programmable Gate Arrays (FPGAs) to accelerate financial derivative calculations is becoming very common. In this work, we implement an FPGA-based specific processor for European option pricing using Monte Carlo simulations, and we compare its performance and power dissipation to the execution on a CPU. The experimental results show that impressive results, in terms of speed-up and energy savings, can be obtained by using FPGA-based accelerators at expenses of a longer development time.
Original languageEnglish
Title of host publication2012 NORCHIP
Number of pages4
PublisherIEEE
Publication date2012
ISBN (Print)978-1-4673-2221-8
ISBN (Electronic)978-1-4673-2222-5
DOIs
Publication statusPublished - 2012
Event30th NORCHIP conference - Copenhagen, Denmark
Duration: 12 Nov 201213 Nov 2012

Conference

Conference30th NORCHIP conference
CountryDenmark
CityCopenhagen
Period12/11/201213/11/2012
CitationsWeb of Science® Times Cited: No match on DOI
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