Design of a 3rd order micro power switched current ΣΔ-modulator

Ivan Harald Holger Jørgensen; Gudmundur Bogason

doi:10.1109/ICECS.1996.584542

Design of a 3rd order micro power switched current ΣΔ-modulator

Ivan Harald Holger Jørgensen, Gudmundur Bogason

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Abstract

This paper reports the design of a 3rd order switched current-ΣΔ-modulator. The modulator is design to have a SNR of 80 dB with a signal bandwidth of fb=6 kHz. The oversampling ratio is R=90 and the sampling frequency fs=1.08 MHz. Multiple input signals are used to reduce the internal signal swings, which results in reduced power consumption. The noise from the 2nd and 3rd integrator is shaped. This is used to allow the noise power from these integrators to be increased and hence saving power. The power consumption of the first integrator is 254 μW and the total power consumption is 600 μW. The supply voltage is VDD=2.7 V. A new methology is presented that allows for optimization of SI circuits for minimum power consumption with respect to process tolerances

Original language	English
Title of host publication	Proceedings of the Third IEEE International Conference on Electronics, Circuits and Systems
Volume	Volume 2
Publisher	IEEE
Publication date	1996
Pages	948-951
ISBN (Print)	07-80-33650-X
DOIs	https://doi.org/10.1109/ICECS.1996.584542
Publication status	Published - 1996
Event	1996 IEEE 3rd International Conference on Electronics, Circuits and Systems - Rodos, Greece Duration: 16 Oct 1996 → 16 Oct 1996 Conference number: 3 https://ieeexplore.ieee.org/xpl/conhome/4443/proceeding

Conference

Conference	1996 IEEE 3rd International Conference on Electronics, Circuits and Systems
Number	3
Country/Territory	Greece
City	Rodos
Period	16/10/1996 → 16/10/1996
Internet address	https://ieeexplore.ieee.org/xpl/conhome/4443/proceeding

Bibliographical note

Copyright 1996 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.

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title = "Design of a 3rd order micro power switched current ΣΔ-modulator",

abstract = "This paper reports the design of a 3rd order switched current-ΣΔ-modulator. The modulator is design to have a SNR of 80 dB with a signal bandwidth of fb=6 kHz. The oversampling ratio is R=90 and the sampling frequency fs=1.08 MHz. Multiple input signals are used to reduce the internal signal swings, which results in reduced power consumption. The noise from the 2nd and 3rd integrator is shaped. This is used to allow the noise power from these integrators to be increased and hence saving power. The power consumption of the first integrator is 254 μW and the total power consumption is 600 μW. The supply voltage is VDD=2.7 V. A new methology is presented that allows for optimization of SI circuits for minimum power consumption with respect to process tolerances",

author = "J{\o}rgensen, {Ivan Harald Holger} and Gudmundur Bogason",

note = "Copyright 1996 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.; 1996 IEEE 3rd International Conference on Electronics, Circuits and Systems, ICECS 1996 ; Conference date: 16-10-1996 Through 16-10-1996",

year = "1996",

doi = "10.1109/ICECS.1996.584542",

language = "English",

isbn = "07-80-33650-X",

volume = "Volume 2",

pages = "948--951",

booktitle = "Proceedings of the Third IEEE International Conference on Electronics, Circuits and Systems",

publisher = "IEEE",

address = "United States",

url = "https://ieeexplore.ieee.org/xpl/conhome/4443/proceeding",

}

Jørgensen, IHH & Bogason, G 1996, Design of a 3rd order micro power switched current ΣΔ-modulator. in Proceedings of the Third IEEE International Conference on Electronics, Circuits and Systems. vol. Volume 2, IEEE, pp. 948-951, 1996 IEEE 3rd International Conference on Electronics, Circuits and Systems, Rodos, Greece, 16/10/1996. https://doi.org/10.1109/ICECS.1996.584542

TY - GEN

T1 - Design of a 3rd order micro power switched current ΣΔ-modulator

AU - Jørgensen, Ivan Harald Holger

AU - Bogason, Gudmundur

N1 - Conference code: 3

PY - 1996

Y1 - 1996

N2 - This paper reports the design of a 3rd order switched current-ΣΔ-modulator. The modulator is design to have a SNR of 80 dB with a signal bandwidth of fb=6 kHz. The oversampling ratio is R=90 and the sampling frequency fs=1.08 MHz. Multiple input signals are used to reduce the internal signal swings, which results in reduced power consumption. The noise from the 2nd and 3rd integrator is shaped. This is used to allow the noise power from these integrators to be increased and hence saving power. The power consumption of the first integrator is 254 μW and the total power consumption is 600 μW. The supply voltage is VDD=2.7 V. A new methology is presented that allows for optimization of SI circuits for minimum power consumption with respect to process tolerances

AB - This paper reports the design of a 3rd order switched current-ΣΔ-modulator. The modulator is design to have a SNR of 80 dB with a signal bandwidth of fb=6 kHz. The oversampling ratio is R=90 and the sampling frequency fs=1.08 MHz. Multiple input signals are used to reduce the internal signal swings, which results in reduced power consumption. The noise from the 2nd and 3rd integrator is shaped. This is used to allow the noise power from these integrators to be increased and hence saving power. The power consumption of the first integrator is 254 μW and the total power consumption is 600 μW. The supply voltage is VDD=2.7 V. A new methology is presented that allows for optimization of SI circuits for minimum power consumption with respect to process tolerances

U2 - 10.1109/ICECS.1996.584542

DO - 10.1109/ICECS.1996.584542

M3 - Article in proceedings

SN - 07-80-33650-X

VL - Volume 2

SP - 948

EP - 951

BT - Proceedings of the Third IEEE International Conference on Electronics, Circuits and Systems

PB - IEEE

T2 - 1996 IEEE 3rd International Conference on Electronics, Circuits and Systems

Y2 - 16 October 1996 through 16 October 1996

ER -

Design of a 3rd order micro power switched current ΣΔ-modulator

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