A digitally trimmable MOS transistor is a MOS transistor consisting of a drain, a source, and a main gate as well as several subgates. The transconductance of the transistor is tunabledigitally by means of connecting subgates either to the main gate or to the source terminal. In this paper, a systematic design method for a digitally trimmable MOS transistor structure is proposed. Using the proposed method, we have designed a digitally trimmable MOS transistor structure and prototype devices were fabricated in a 2.4 micron n-well CMOS technology. Through measurements on these devices, the design method has been experimentally confirmed. The trimmable MOS transistor structure has been applied to a high precision current mirror to reduce mismatch in the current mirror. With the trimmable transistor structure, the mismatch can be reduced by more than one order of magnitude.
|Journal||International Journal of Electronics|
|Publication status||Published - 1996|