Design and FPGA-implementation of asynchronous circuits using two-phase handshaking

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Abstract

This paper addresses the design and FPGA-prototyping of asynchronous circuits using static data-flow handshake components implemented using the two-phase bundled-data protocol. The contributions are partly tutorial and partly scientific. The paper introduces the design process, including initialization and design of coupled rings with any number of tokens. Following this, the paper presents gate-level implementations of the full set of handshake components as well as some peephole optimizations that merge the implementation of several components. The components are implemented using the clicklate. The handshake register implementation is extended with circuitry that decouples the phase of the handshake signals on the input and output ports. Such decoupling is needed to facilitate implementation of rings with one token (or in the general case, rings with any number of tokens). Finally, the paper illustrates the design process using two circuits: one that outputs the sequence of Fibonacci numbers, and one that computes the greatest common divisor of two positive integers. All components are described in VHDL, and all code is available as open source. All components and the two circuits mentioned have been tested on a Xilinx Nexys4DDR FPGA board.

Original languageEnglish
Title of host publicationProceedings of 2019 25th IEEE International Symposium on Asynchronous Circuits and Systems.
PublisherIEEE Computer Society Press
Publication date1 May 2019
Pages9-18
Article number8850673
ISBN (Electronic)9781538647479
DOIs
Publication statusPublished - 1 May 2019
Event25th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2019 - Hirosaki, Japan
Duration: 12 May 201915 May 2019

Conference

Conference25th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2019
CountryJapan
CityHirosaki
Period12/05/201915/05/2019
SponsorAomori Prefecture, IEEE, IEEE, Intel, IEEE

Keywords

  • Asynchronous circuits
  • Field Programmable Gate Array
  • Implementation
  • Two phase handshaking

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