This paper shows how good RF capacitors can be made in a standard digital CMOS process. The capacitors which are also well suited for binary weighted switched capacitor banks show very good RF performance: Q-values of 57 at 4.0 GHz, a density of 0.27 fF/μ2, 2.2 μm wide shielded unit capacitors, 6% bottom plate capacitance, better than 3-5% process variation and negligible series inductance. Further, a simple yet accurate method is presented that allows hand calculation of the capacitance value.
|Title of host publication||Digest of the 2001 IEEE VLSI Circuits Symposium|
|Place of Publication||Kyoto|
|Publication status||Published - 2001|
|Event||Symposium on VLSI Circuits - Kyoto|
Duration: 1 Jan 2001 → …
|Conference||Symposium on VLSI Circuits|
|Period||01/01/2001 → …|