Abstract
One of the challenges of designing a heterogeneous multiprocessor SoC is to find the right partitioning of the application onto the platform architecture. The right partitioning is dependent on the characteristics of the processors and the network connecting them, as well as the application. We present a system-level modelling framework (ARTS) which allows for cross-layer modelling and analysis, covering application layer, middelware layer, and hardware layer. ARTS allow the designer to explore and analyse; the network performance under different traffic and load conditions, consequences of different mappings of tasks to processors (software or hardware) including memory usage, and effects of RTOS selection, including scheduling, synchronization and resource allocation policies. In this presentation we focus on the programmer’s view illustrated through a design space exploration of a multi-mode multimedia application mapped onto an MPSoC platform.
| Original language | English |
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| Title of host publication | Multiprocessor System-on-Chip Symposium |
| Publication date | 2005 |
| Publication status | Published - 2005 |