Critical Path Driven Cosynthesis for Heterogeneous Target Architectures

Peter Bjørn-Jørgensen; Jan Madsen

doi:10.1109/HSC.1997.584573

Critical Path Driven Cosynthesis for Heterogeneous Target Architectures

Peter Bjørn-Jørgensen
, Jan Madsen

Research output: Chapter in Book/Report/Conference proceeding › Article in proceedings › Research › peer-review

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Abstract

This paper presents a critical path driven algorithm to produce a static schedule of a single-rate system onto a heterogeneous target architecture. Our algorithm is a list based scheduling algorithm which concurrently assigns tasks to processors and allocates nets to interprocessor communication. Experimental results show that our algorithm is able to find good results, as compared to other methods, in small amount of CPU time.

Original language	English
Title of host publication	International Workshop on Hardware/Software Codesign
Publisher	IEEE
Publication date	1997
Pages	15-19
ISBN (Print)	0-8186-7895-X
DOIs	https://doi.org/10.1109/HSC.1997.584573
Publication status	Published - 1997
Event	7th IEEE/ACM International Conference on Hardware/Software Codesign and System Synthesis - Grenoble, France Duration: 11 Oct 2009 → 16 Oct 2009 Conference number: 7

Conference

Conference	7th IEEE/ACM International Conference on Hardware/Software Codesign and System Synthesis
Number	7
Country/Territory	France
City	Grenoble
Period	11/10/2009 → 16/10/2009

Bibliographical note

Copyright: 1997 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE

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10.1109/HSC.1997.584573

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title = "Critical Path Driven Cosynthesis for Heterogeneous Target Architectures",

abstract = "This paper presents a critical path driven algorithm to produce a static schedule of a single-rate system onto a heterogeneous target architecture. Our algorithm is a list based scheduling algorithm which concurrently assigns tasks to processors and allocates nets to interprocessor communication. Experimental results show that our algorithm is able to find good results, as compared to other methods, in small amount of CPU time.",

author = "Peter Bj{\o}rn-J{\o}rgensen and Jan Madsen",

note = "Copyright: 1997 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE; 7th IEEE/ACM International Conference on Hardware/Software Codesign and System Synthesis, CODES 2009 ; Conference date: 11-10-2009 Through 16-10-2009",

year = "1997",

doi = "10.1109/HSC.1997.584573",

language = "English",

isbn = "0-8186-7895-X",

pages = "15--19",

booktitle = "International Workshop on Hardware/Software Codesign",

publisher = "IEEE",

address = "United States",

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AU - Bjørn-Jørgensen, Peter

AU - Madsen, Jan

N1 - Conference code: 7

PY - 1997

Y1 - 1997

N2 - This paper presents a critical path driven algorithm to produce a static schedule of a single-rate system onto a heterogeneous target architecture. Our algorithm is a list based scheduling algorithm which concurrently assigns tasks to processors and allocates nets to interprocessor communication. Experimental results show that our algorithm is able to find good results, as compared to other methods, in small amount of CPU time.

AB - This paper presents a critical path driven algorithm to produce a static schedule of a single-rate system onto a heterogeneous target architecture. Our algorithm is a list based scheduling algorithm which concurrently assigns tasks to processors and allocates nets to interprocessor communication. Experimental results show that our algorithm is able to find good results, as compared to other methods, in small amount of CPU time.

U2 - 10.1109/HSC.1997.584573

DO - 10.1109/HSC.1997.584573

M3 - Article in proceedings

SN - 0-8186-7895-X

SP - 15

EP - 19

BT - International Workshop on Hardware/Software Codesign

PB - IEEE

T2 - 7th IEEE/ACM International Conference on Hardware/Software Codesign and System Synthesis

Y2 - 11 October 2009 through 16 October 2009

ER -

Critical Path Driven Cosynthesis for Heterogeneous Target Architectures

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