Abstract
The basic algorithms underlying an automatic hardware synthesis environment using fully formal graphical requirements specifications as source language are outlined. The source language is real-time symbolic timing diagrams [FeyerabendJosko97], which are a metric-time temporal logic such that hard real-time constraints have to be dealt with. While automata-theoretic methods based on translating the specification to a finite automaton and constructing a winning strategy in the resulting omega-regular game could in principle be used, and do indeed provide the core algorithm, complexity withstands practical application of these methods. Therefore, a compositional extension is explored, which yields modular synthesis of multi-component controllers. Based on this, a second extension is proposed for efficiently dealing with hard real-time constraints.
Original language | English |
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Title of host publication | Formal Techniques in Real-Time and Fault-Tolerant Systems. 5th International Symposium, FTRTFT'98. Proceedings |
Publisher | Springer Verlag |
Publication date | 1998 |
Pages | 272-281 |
ISBN (Print) | 3 540 65003 2 |
Publication status | Published - 1998 |
Event | 5th International Symposium Formal Techniques in Real-Time and Fault-Tolerant Systems - Kgs. Lyngby, Denmark Duration: 14 Sept 1998 → 18 Sept 1998 Conference number: 5 http://www.informatik.uni-trier.de/~ley/db/conf/ftrtft/ftrtft1998.html |
Conference
Conference | 5th International Symposium Formal Techniques in Real-Time and Fault-Tolerant Systems |
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Number | 5 |
Country/Territory | Denmark |
City | Kgs. Lyngby |
Period | 14/09/1998 → 18/09/1998 |
Internet address |