Class-E rectifier with finite inductance is widely used for the rectification of 6.78-MHz WPT systems. However, the phase-shift of input impedance is relatively large over its load range and may degrade the transfer efficiency. This paper proposes a new design methodology of class-E rectifiers to achieve a near-resistive input impedance over a wide load range. A time-domain model is built for circuit analysis and parameter optimization. In the calculation examples, the maximum phase of input impedance can be reduced by at least 56.5 % compared to the conventional ones. The proposed design method and the circuit model are verified by simulation and measurement.
|Conference||9th IEEE International Power Electronics and Motion Control Conference|
|Period||29/11/2020 → 02/12/2020|
|Series||2020 IEEE 9th International Power Electronics and Motion Control Conference, IPEMC 2020 ECCE Asia|