Chip-Multiprocessor Hardware Locks for Safety-Critical Java

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Abstract

Accessing shared resources in multicore systems is usually protected by a software locking mechanism, which itself is implemented through atomic operations. This can result in a large synchronization overhead, which, in the context of real-time systems, increases the worst-case execution time and may void a task set's schedulability. In this paper we present a hardware locking mechanism to reduce the synchronization overhead. The solution is implemented for the chip-multiprocessor version of the Java Optimized Processor in the context of safety-critical Java. The implementation is compared to a software solution. The performance and the hardware cost are evaluated.

Original languageEnglish
Title of host publicationProceedings of the 11th International Workshop on Java Technologies for Real-time and Embedded Systems
PublisherAssociation for Computing Machinery
Publication date2013
Pages38-46
ISBN (Print)978-1-4503-2166-2
DOIs
Publication statusPublished - 2013
Event11th International Workshop on Java Technologies for Real-time and Embedded Systems (JTRES 2013) - Karlsruhe, Germany
Duration: 9 Oct 201310 Oct 2013
http://jtres2013.atego.com/

Conference

Conference11th International Workshop on Java Technologies for Real-time and Embedded Systems (JTRES 2013)
CountryGermany
CityKarlsruhe
Period09/10/201310/10/2013
Internet address

Cite this

Strøm, T. B., Puffitsch, W., & Schoeberl, M. (2013). Chip-Multiprocessor Hardware Locks for Safety-Critical Java. In Proceedings of the 11th International Workshop on Java Technologies for Real-time and Embedded Systems (pp. 38-46). Association for Computing Machinery. https://doi.org/10.1145/2512989.2512995