Abstract
Relaxed memory models offer suitable abstractions of the actual optimizations offered by multi-core architectures and by compilers of concurrent programming languages. Using such abstractions for verification purposes is challenging in part due to their inherent non-determinism which contributes to the state space explosion. Several techniques have been proposed to mitigate those problems so to make verification under relaxed memory models feasible. We discuss how to adopt some of those techniques in a Maude-based approach to language prototyping, and suggest the use of other techniques that have been shown successful for similar verification purposes.
Original language | English |
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Title of host publication | Revised Selected Papers of the 10th International Workshop on Rewriting Logic and Its Applications, WRLA 2014 |
Editors | Santiago Escobar |
Publisher | Springer |
Publication date | 2014 |
Pages | 21-41 |
ISBN (Print) | 978-3-319-12903-7 |
ISBN (Electronic) | 978-3-319-12904-4 |
DOIs | |
Publication status | Published - 2014 |
Event | 10th International Workshop on Rewriting Logic and its Applications (WRLA 2014) - Grenoble, France Duration: 5 Apr 2014 → 6 Apr 2014 Conference number: 10 http://users.dsic.upv.es/workshops/wrla2014/#main |
Workshop
Workshop | 10th International Workshop on Rewriting Logic and its Applications (WRLA 2014) |
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Number | 10 |
Country/Territory | France |
City | Grenoble |
Period | 05/04/2014 → 06/04/2014 |
Internet address |
Series | Lecture Notes in Computer Science |
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Volume | 8663 |
ISSN | 0302-9743 |