Abstract
We present an approach to bus access optimization and schedulability analysis for the synthesis of hard real-time distribution embedded systems. The communication model is based on a time-triggered protocol. We have developed an analysis for the communication delays proposing four different message scheduling policies over a time-triggered communication channel. Optimization strategies for the bus access scheme are developed, and the four approaches to message scheduling are compared using extensive experiments.
Original language | English |
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Title of host publication | Proceedings of the Design, Automation and Test in Europe Conference and Exhibition 2000 |
Publisher | IEEE |
Publication date | 2000 |
Pages | 567-574 |
ISBN (Print) | 0-7695-0537-6 |
DOIs | |
Publication status | Published - 2000 |
Event | Design Automation and Test in Europe - Paris, France Duration: 27 Mar 2000 → 30 Mar 2000 |
Conference
Conference | Design Automation and Test in Europe |
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Country/Territory | France |
City | Paris |
Period | 27/03/2000 → 30/03/2000 |