This paper describes a system for the synthesis of multilevel combinational logic, transforming functional description into mask layout. The system includes a logic synthesis part, partly consisting of tools developed at Eindhoven University of Technology, which has been interfaced to the layout synthesis part in the CATOE-system, developed at the DesignCenter of Electronics Institute. The various steps in the transformation are presented together with a complete design example, implementing a multi-output combinational decoder function.
|Title of host publication||Proceedings of the 15th European Solid-State Circuits Conference|
|Publication status||Published - 1989|
|Event||15th European Solid-State Circuits Conference - Vienna, Austria|
Duration: 20 Sept 1989 → 22 Sept 1989
Conference number: 15
|Conference||15th European Solid-State Circuits Conference|
|Period||20/09/1989 → 22/09/1989|