Automatic generation of application specific FPGA multicore accelerators

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedings – Annual report year: 2014Researchpeer-review

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High performance computing systems make increasing use of hardware accelerators to improve performance and power properties. For large high-performance FPGAs to be successfully integrated in such computing systems, methods to raise the abstraction level of FPGA programming are required. In this paper we propose a tool flow, which automatically generates highly optimized hardware multicore systems based on parameters. Profiling feedback is used to adjust these parameters to improve performance and lower the power consumption. For an image processing application we show that our tools are able to identify optimal performance energy trade-offs points for a multicore based FPGA accelerator.
Original languageEnglish
Title of host publicationConference Record of the 48th Asilomar Conference on Signals, Systems & Computers
EditorsMichael B. Matthews
PublisherIEEE
Publication date2014
Pages1440-1444
ISBN (Print)978-1-4799-8295-0
DOIs
Publication statusPublished - 2014
Event48th Asilomar Conference on Signals, Systems and Computers - Pacific Grove, California, United States
Duration: 2 Nov 20145 Nov 2014
Conference number: 48
http://www.asilomarsscconf.org/

Conference

Conference48th Asilomar Conference on Signals, Systems and Computers
Number48
CountryUnited States
City Pacific Grove, California
Period02/11/201405/11/2014
Internet address
CitationsWeb of Science® Times Cited: No match on DOI

    Research areas

  • Bioengineering, Communication, Networking and Broadcast Technologies, Components, Circuits, Devices and Systems, Computing and Processing, Signal Processing and Analysis

ID: 108588342