Automatic generation of application specific FPGA multicore accelerators

Andreas Erik Hindborg; Pascal Schleuniger; Nicklas Bo Jensen; Maxwell Walter; Laust Brock-Nannestad; Lars Frydendal Bonnichsen; Christian W. Probst; Sven  Karlsson

doi:10.1109/ACSSC.2014.7094700

Automatic generation of application specific FPGA multicore accelerators

Andreas Erik Hindborg, Pascal Schleuniger, Nicklas Bo Jensen, Maxwell Walter, Laust Brock-Nannestad, Lars Frydendal Bonnichsen, Christian W. Probst, Sven Karlsson

Research output: Chapter in Book/Report/Conference proceeding › Article in proceedings › Research › peer-review

Abstract

High performance computing systems make increasing use of hardware accelerators to improve performance and power properties. For large high-performance FPGAs to be successfully integrated in such computing systems, methods to raise the abstraction level of FPGA programming are required. In this paper we propose a tool flow, which automatically generates highly optimized hardware multicore systems based on parameters. Profiling feedback is used to adjust these parameters to improve performance and lower the power consumption. For an image processing application we show that our tools are able to identify optimal performance energy trade-offs points for a multicore based FPGA accelerator.

Original language	English
Title of host publication	Conference Record of the 48th Asilomar Conference on Signals, Systems & Computers
Editors	Michael B. Matthews
Publisher	IEEE
Publication date	2014
Pages	1440-1444
ISBN (Print)	978-1-4799-8295-0
DOIs	https://doi.org/10.1109/ACSSC.2014.7094700
Publication status	Published - 2014
Event	48th Asilomar Conference on Signals, Systems and Computers - Pacific Grove, California, United States Duration: 2 Nov 2014 → 5 Nov 2014 Conference number: 48 http://www.asilomarsscconf.org/

Conference

Conference	48th Asilomar Conference on Signals, Systems and Computers
Number	48
Country	United States
City	Pacific Grove, California
Period	02/11/2014 → 05/11/2014
Internet address	http://www.asilomarsscconf.org/

Keywords

Bioengineering
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Signal Processing and Analysis

Access to Document

10.1109/ACSSC.2014.7094700

Fingerprint Dive into the research topics of 'Automatic generation of application specific FPGA multicore accelerators'. Together they form a unique fingerprint.

Cite this

Hindborg, A. E., Schleuniger, P., Jensen, N. B., Walter, M., Brock-Nannestad, L., Bonnichsen, L. F., Probst, C. W., & Karlsson, S. (2014). Automatic generation of application specific FPGA multicore accelerators. In M. B. Matthews (Ed.), Conference Record of the 48th Asilomar Conference on Signals, Systems & Computers (pp. 1440-1444). IEEE. https://doi.org/10.1109/ACSSC.2014.7094700

Hindborg, Andreas Erik ; Schleuniger, Pascal ; Jensen, Nicklas Bo ; Walter, Maxwell ; Brock-Nannestad, Laust ; Bonnichsen, Lars Frydendal ; Probst, Christian W. ; Karlsson, Sven . / Automatic generation of application specific FPGA multicore accelerators. Conference Record of the 48th Asilomar Conference on Signals, Systems & Computers. editor / Michael B. Matthews. IEEE, 2014. pp. 1440-1444

@inproceedings{e12217af0de3414b9a41af884d219b62,

title = "Automatic generation of application specific FPGA multicore accelerators",

abstract = "High performance computing systems make increasing use of hardware accelerators to improve performance and power properties. For large high-performance FPGAs to be successfully integrated in such computing systems, methods to raise the abstraction level of FPGA programming are required. In this paper we propose a tool flow, which automatically generates highly optimized hardware multicore systems based on parameters. Profiling feedback is used to adjust these parameters to improve performance and lower the power consumption. For an image processing application we show that our tools are able to identify optimal performance energy trade-offs points for a multicore based FPGA accelerator.",

keywords = "Bioengineering, Communication, Networking and Broadcast Technologies, Components, Circuits, Devices and Systems, Computing and Processing, Signal Processing and Analysis",

author = "Hindborg, {Andreas Erik} and Pascal Schleuniger and Jensen, {Nicklas Bo} and Maxwell Walter and Laust Brock-Nannestad and Bonnichsen, {Lars Frydendal} and Probst, {Christian W.} and Sven Karlsson",

year = "2014",

doi = "10.1109/ACSSC.2014.7094700",

language = "English",

isbn = "978-1-4799-8295-0",

pages = "1440--1444",

editor = "Matthews, {Michael B. }",

booktitle = "Conference Record of the 48th Asilomar Conference on Signals, Systems & Computers",

publisher = "IEEE",

address = "United States",

note = "48th Asilomar Conference on Signals, Systems and Computers ; Conference date: 02-11-2014 Through 05-11-2014",

url = "http://www.asilomarsscconf.org/",

}

Hindborg, AE, Schleuniger, P, Jensen, NB, Walter, M, Brock-Nannestad, L, Bonnichsen, LF, Probst, CW & Karlsson, S 2014, Automatic generation of application specific FPGA multicore accelerators. in MB Matthews (ed.), Conference Record of the 48th Asilomar Conference on Signals, Systems & Computers. IEEE, pp. 1440-1444, 48th Asilomar Conference on Signals, Systems and Computers, Pacific Grove, California, United States, 02/11/2014. https://doi.org/10.1109/ACSSC.2014.7094700

Automatic generation of application specific FPGA multicore accelerators. / Hindborg, Andreas Erik; Schleuniger, Pascal; Jensen, Nicklas Bo; Walter, Maxwell; Brock-Nannestad, Laust; Bonnichsen, Lars Frydendal; Probst, Christian W.; Karlsson, Sven .

Conference Record of the 48th Asilomar Conference on Signals, Systems & Computers. ed. / Michael B. Matthews. IEEE, 2014. p. 1440-1444.

Research output: Chapter in Book/Report/Conference proceeding › Article in proceedings › Research › peer-review

TY - GEN

T1 - Automatic generation of application specific FPGA multicore accelerators

AU - Hindborg, Andreas Erik

AU - Schleuniger, Pascal

AU - Jensen, Nicklas Bo

AU - Walter, Maxwell

AU - Brock-Nannestad, Laust

AU - Bonnichsen, Lars Frydendal

AU - Probst, Christian W.

AU - Karlsson, Sven

N1 - Conference code: 48

PY - 2014

Y1 - 2014

N2 - High performance computing systems make increasing use of hardware accelerators to improve performance and power properties. For large high-performance FPGAs to be successfully integrated in such computing systems, methods to raise the abstraction level of FPGA programming are required. In this paper we propose a tool flow, which automatically generates highly optimized hardware multicore systems based on parameters. Profiling feedback is used to adjust these parameters to improve performance and lower the power consumption. For an image processing application we show that our tools are able to identify optimal performance energy trade-offs points for a multicore based FPGA accelerator.

AB - High performance computing systems make increasing use of hardware accelerators to improve performance and power properties. For large high-performance FPGAs to be successfully integrated in such computing systems, methods to raise the abstraction level of FPGA programming are required. In this paper we propose a tool flow, which automatically generates highly optimized hardware multicore systems based on parameters. Profiling feedback is used to adjust these parameters to improve performance and lower the power consumption. For an image processing application we show that our tools are able to identify optimal performance energy trade-offs points for a multicore based FPGA accelerator.

KW - Bioengineering

KW - Communication, Networking and Broadcast Technologies

KW - Components, Circuits, Devices and Systems

KW - Computing and Processing

KW - Signal Processing and Analysis

U2 - 10.1109/ACSSC.2014.7094700

DO - 10.1109/ACSSC.2014.7094700

M3 - Article in proceedings

SN - 978-1-4799-8295-0

SP - 1440

EP - 1444

BT - Conference Record of the 48th Asilomar Conference on Signals, Systems & Computers

A2 - Matthews, Michael B.

PB - IEEE

T2 - 48th Asilomar Conference on Signals, Systems and Computers

Y2 - 2 November 2014 through 5 November 2014

ER -