Abstract
The Network-on-chip concept has evolved as a solution
to a broad range of problems related to the design of complex systems-on-chip (SoC) with tenths or hundreds of (heterogeneous) IP-cores. The paper introduces the NoC concept, identifies a range of possible timing organizations (globally-synchronous, mesochronous, globally-asynchronous locally-synchronous and fully asynchronous), discusses the circuitry needed to implement these timing methodologies, and provides some implementation details for a couple of asynchronous NoCs designed at the Technical University of Denmark (DTU). The paper is written to support an invited talk at the NORCHIP’2007 conference.
Original language | English |
---|---|
Title of host publication | Proceedings of the 25th IEEE NORCHIP Conference 2007 |
Number of pages | 4 |
Publisher | IEEE |
Publication date | 2007 |
ISBN (Print) | 978-1-4244-1516-8 |
DOIs | |
Publication status | Published - 2007 |
Event | 2007 IEEE 25th NORCHIP Conference - Aalborg, Denmark Duration: 19 Nov 2007 → 20 Nov 2007 Conference number: 25 https://ieeexplore.ieee.org/xpl/conhome/4472911/proceeding |
Conference
Conference | 2007 IEEE 25th NORCHIP Conference |
---|---|
Number | 25 |
Country/Territory | Denmark |
City | Aalborg |
Period | 19/11/2007 → 20/11/2007 |
Internet address |