ASAM: Automatic architecture synthesis and application mapping

Lech Jozwiak; Menno Lindwer; Rosilde Corvino; Paolo Meloni; Laura Micconi; Jan Madsen; Erkan Diken; Deepak Gangadharan; Roel Jordans; Sebastiano Pomata; Paul Pop; Giuseppe Tuveri; Luigi Raffo; Giuseppe Notarangelo

doi:10.1016/j.micpro.2013.08.006

ASAM: Automatic architecture synthesis and application mapping

Lech Jozwiak, Menno Lindwer, Rosilde Corvino, Paolo Meloni, Laura Micconi, Jan Madsen, Erkan Diken, Deepak Gangadharan, Roel Jordans, Sebastiano Pomata, Paul Pop, Giuseppe Tuveri, Luigi Raffo, Giuseppe Notarangelo

Research output: Contribution to journal › Journal article › Research › peer-review

Abstract

This paper focuses on mastering the automatic architecture synthesis and application mapping for heterogeneous massively-parallel MPSoCs based on customizable application-specific instruction-set processors (ASIPs). It presents an overview of the research being currently performed in the scope of the European project ASAM of the ARTEMIS program. The paper briefly presents the results of our analysis of the main challenges to be faced in the design of such heterogeneous MPSoCs. It explains which system, design, and electronic design automation (EDA) concepts seem to be adequate to address the challenges and solve the problems. Finally, it discusses the ASAM design-flow, its main stages and tools and their application to a real-life case study.

Original language	English
Journal	Microprocessors and Microsystems
Volume	37
Issue number	8, Part C
Pages (from-to)	1002-1019
ISSN	0141-9331
DOIs	https://doi.org/10.1016/j.micpro.2013.08.006
Publication status	Published - 2013

Keywords

Embedded systems
Heterogeneous multi-processor system-onchip (MPSoC)
Customizable ASIPs
Architecture synthesis
MPSoC and ASIP design automation

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Jozwiak, Lech ; Lindwer, Menno ; Corvino, Rosilde ; Meloni, Paolo ; Micconi, Laura ; Madsen, Jan ; Diken, Erkan ; Gangadharan, Deepak ; Jordans, Roel ; Pomata, Sebastiano ; Pop, Paul ; Tuveri, Giuseppe ; Raffo, Luigi ; Notarangelo, Giuseppe. / ASAM: Automatic architecture synthesis and application mapping. In: Microprocessors and Microsystems. 2013 ; Vol. 37, No. 8, Part C. pp. 1002-1019.

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abstract = "This paper focuses on mastering the automatic architecture synthesis and application mapping for heterogeneous massively-parallel MPSoCs based on customizable application-specific instruction-set processors (ASIPs). It presents an overview of the research being currently performed in the scope of the European project ASAM of the ARTEMIS program. The paper briefly presents the results of our analysis of the main challenges to be faced in the design of such heterogeneous MPSoCs. It explains which system, design, and electronic design automation (EDA) concepts seem to be adequate to address the challenges and solve the problems. Finally, it discusses the ASAM design-flow, its main stages and tools and their application to a real-life case study.",

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author = "Lech Jozwiak and Menno Lindwer and Rosilde Corvino and Paolo Meloni and Laura Micconi and Jan Madsen and Erkan Diken and Deepak Gangadharan and Roel Jordans and Sebastiano Pomata and Paul Pop and Giuseppe Tuveri and Luigi Raffo and Giuseppe Notarangelo",

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ASAM: Automatic architecture synthesis and application mapping. / Jozwiak, Lech; Lindwer, Menno; Corvino, Rosilde; Meloni, Paolo; Micconi, Laura; Madsen, Jan; Diken, Erkan; Gangadharan, Deepak; Jordans, Roel; Pomata, Sebastiano; Pop, Paul; Tuveri, Giuseppe; Raffo, Luigi; Notarangelo, Giuseppe.

In: Microprocessors and Microsystems, Vol. 37, No. 8, Part C, 2013, p. 1002-1019.

Research output: Contribution to journal › Journal article › Research › peer-review

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AU - Jozwiak, Lech

AU - Lindwer, Menno

AU - Corvino, Rosilde

AU - Meloni, Paolo

AU - Micconi, Laura

AU - Madsen, Jan

AU - Diken, Erkan

AU - Gangadharan, Deepak

AU - Jordans, Roel

AU - Pomata, Sebastiano

AU - Pop, Paul

AU - Tuveri, Giuseppe

AU - Raffo, Luigi

AU - Notarangelo, Giuseppe

PY - 2013

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AB - This paper focuses on mastering the automatic architecture synthesis and application mapping for heterogeneous massively-parallel MPSoCs based on customizable application-specific instruction-set processors (ASIPs). It presents an overview of the research being currently performed in the scope of the European project ASAM of the ARTEMIS program. The paper briefly presents the results of our analysis of the main challenges to be faced in the design of such heterogeneous MPSoCs. It explains which system, design, and electronic design automation (EDA) concepts seem to be adequate to address the challenges and solve the problems. Finally, it discusses the ASAM design-flow, its main stages and tools and their application to a real-life case study.

KW - Embedded systems

KW - Heterogeneous multi-processor system-onchip (MPSoC)

KW - Customizable ASIPs

KW - Architecture synthesis

KW - MPSoC and ASIP design automation

U2 - 10.1016/j.micpro.2013.08.006

DO - 10.1016/j.micpro.2013.08.006

M3 - Journal article

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