Abstract
Designing complex heterogeneousmultiprocessor Systemon-
Chip (MPSoC) requires support for modeling and analysis
of the different layers i.e. application, operating system
(OS) and platform architecture. This paper presents an abstract
system-level modeling framework, called ARTS, to support
the MPSoC designers in modeling the different layers
and understanding their causalities. While others have developed
tools for static analysis and modeled limited correlations
(processor-memory or processor-communication), our
model captures the impact of dynamic and unpredictable OS
behaviour on processor, memory and communication performance.
In particular, we focus on analyzing the impact of
application mapping on the processor and memory utilization
taking the on-chip communication latency into account.
A case-study of real-time multimedia application consisting
of 114 tasks on a 6-processor platform for a handheld terminal
shows our frameworks co-exploration capabilities.
Original language | English |
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Title of host publication | 13th IEEE International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS) |
Publisher | IEEE Computer Society Press |
Publication date | 2005 |
ISBN (Print) | 0-7695-2458-3 |
DOIs | |
Publication status | Published - 2005 |
Event | 13th IEEE International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems - Atlanta, United States Duration: 27 Sept 2005 → 29 Sept 2005 Conference number: 13 https://ieeexplore.ieee.org/xpl/conhome/10197/proceeding |
Conference
Conference | 13th IEEE International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems |
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Number | 13 |
Country/Territory | United States |
City | Atlanta |
Period | 27/09/2005 → 29/09/2005 |
Internet address |