Abstract
A previously unknown intrinsic nonlinearity of standard SigmaDelta fractional-N synthesizers is identified. A general analytical model for SigmaDelta fractional-N phased-locked loops (PLLs) that includes the effect of the nonlinearity is derived and an improvement to the synthesizer topology is discussed. Also, a new methodology for behavioral simulation is presented: the proposed methodology is based on an object-oriented event-driven approach and offers the possibility to perform very fast and accurate simulations, and the theoretical models developed validate the simulation results. We show a GSM example to demonstrate the applicability of the simulation methodology to real study cases.
| Original language | English |
|---|---|
| Journal | IEEE transactions on circuits and systems - 2, Analog and digital signal processing |
| Volume | 50 |
| Issue number | 11 |
| Pages (from-to) | 850-859 |
| ISSN | 1057-7130 |
| DOIs | |
| Publication status | Published - 2003 |
Bibliographical note
Copyright: 2003 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEEKeywords
- nonlinearities
- phase noise
- phase-locked loops
- simulation
- sigma-delta modulation
- Linear systems
Cite this
Cassia, M., Shah, P. J., & Bruun, E. (2003). Analytical model and behavioral simulation approach for a ΣΔ fractional-N synthesizer employing a sample-hold element. IEEE transactions on circuits and systems - 2, Analog and digital signal processing, 50(11), 850-859. https://doi.org/10.1109/TCSII.2003.819138