Analysis of the effects of time delay in clock recovery circuits based on Phase-locked loops

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Abstract

Influence of time delay in a balanced optical phase-locked loops (OPLL) with a proportional integrator (Pl) filter is investigated using a delayed differential equation (DDE) is investigated. The limitations, which a time delay imposes on the Pl filter bandwidth, at increasing values of loop gain, are investigated by numerical simulations. Furthermore, simple expressions governing the stability properties of the loop, in the presence of time delay, are derived. For this purpose, three standard loop filters are considered: a Pl filter, a low pass (LP) filter and an active lag (AL) filter. The derived expressions are used to perform an optimisation in terms of the selected loop filters.
Original languageEnglish
Title of host publicationProceedings of IEEE Laser and Electro-Optics Society Annual Meeting : LEOS 2004
VolumePaper TuR4
PublisherIEEE
Publication date2004
Pages316-317
ISBN (Print)0-7803-8557-8
DOIs
Publication statusPublished - 2004
Event17th Annual Meeting of the IEEE Lasers and Electro-Optics Society - Puerto Rico, United States
Duration: 8 Nov 20049 Nov 2004
http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=9410

Conference

Conference17th Annual Meeting of the IEEE Lasers and Electro-Optics Society
Country/TerritoryUnited States
CityPuerto Rico
Period08/11/200409/11/2004
Internet address

Bibliographical note

Copyright: 2004 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE

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