Analysis of Sampled Noise in Switched Current Circuits

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    Abstract

    The understanding of noise in analog sampled data systems is vital for the design of high resolution circuitry. In this paper a general description of sampled and held noise is presented. The noise calculations are verified by measurements on an analog delay line implemented using switched current (SI) technique. Based on the knowledge about sampled and held noise a high resolution/low power third order Sigma-Delta modulator is designed in SI technique. The measured performance of the designed Sigma-Delta modulator corresponds well with the expected performance.
    Original languageEnglish
    Title of host publicationProceedings, Academic Sessions, EMAC'97, European Microelectronics Application Conference
    Place of PublicationDenmark
    PublisherTechnoconsult
    Publication date1997
    Pages108-111
    Publication statusPublished - 1997
    EventEuropean Microelectronics Application Conference - Barcelona, Spain
    Duration: 28 May 199730 May 1997

    Conference

    ConferenceEuropean Microelectronics Application Conference
    CountrySpain
    CityBarcelona
    Period28/05/199730/05/1997

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