Analysis and Design of Start-up Circuits for a 48 V-12 V Switched-Capacitor Converter in a 180 nm SOI Process

In this work an analysis, design and layout of two start-up methods for high-voltage switched-capacitor converters is presented. During the converter start-up phase, the capacitors are charged from their initial voltage to their steady-state voltages. If a start-up approach is not considered, this creates undesired large currents in the power switches and chip I/Os, which can damage the chip. A 48 V −12 V switched-capacitor converter with an integrated power stage and external capacitors is designed and taped out in a 180 nm SOI CMOS process to demonstrate two different approaches of mitigating the start-up problem. The first approach solves the uneven capacitor charging during input ramp-up by creating a charging path from the input to the capacitors and carefully sizing the capacitors. The second approach charges the capacitors with a dedicated active pre-charging circuit and thereby ensures limited peak currents during start-up of the designed switched-capacitor converter. This first start-up method reduces the start-up peak current from 40 A to 6.5 A and the second method lowers the peak current to 3.5 A. The designed pre-charge circuit consumes 105µA quiescent current and has an area of 743µm x 911µm.