An Implantable CMOS Amplifier for Nerve Signals

Jannik Hammel Nielsen, Torsten Lehmann

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

360 Downloads (Pure)


In this paper, a low noise high gain CMOS amplifier for minute nerve signals is presented. By using a mixture of weak- and strong inversion transistors, optimal noise suppression in the amplifier is achieved. A continuous-time offset-compensation technique is utilized in order to minimize impact on the amplifier input nodes. The method for signal recovery from noisy nerve signals is presented. A prototype amplifier is realized in a standard digital 0.5 μm CMOS single poly, n-well process. The prototype amplifier features a gain of 80 dB over a 3.6 kHz bandwidth, a CMRR of more than 87 dB and a PSRR greater than 84 dB. The equivalent input referred noise in the bandwidth of interest is 5 nV/√Hz. The amplifier power consumption is 275 μW.
Original languageEnglish
Title of host publicationICECS 2001: 8th IEEE International Conference on Electronics, Circuits and Systems : Conference Proceedings
Number of pages1183
Publication date2001
ISBN (Print)0-7803-7057-0
Publication statusPublished - 2001
Event8th IEEE International Conference on Electronics, Circuits and Systems - Malta, Spain
Duration: 2 Sep 20015 Sep 2001
Conference number: 8


Conference8th IEEE International Conference on Electronics, Circuits and Systems
SponsorUniversity of Malta

Bibliographical note

Copyright: 2000 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE


Dive into the research topics of 'An Implantable CMOS Amplifier for Nerve Signals'. Together they form a unique fingerprint.

Cite this