Abstract
In this paper we work on the balance between hardware and software implementation of a machine learning algorithm, which belongs to the area of statistical learning theory. We use system-on-chip technology to demonstrate the potential usefulness of moving the critical sections of an algorithm into HW: the so-called hardware/software balance. Our experiments show that the approach can achieve speedups using a complex machine learning algorithm called a support vector machine. The experiments are conducted on a real-time Java Virtual Machine named Java Optimized Processor.
Original language | English |
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Title of host publication | Proceedings of the Fourth Workshop on Intelligent Solutions in Embedded Systems (WISES 2006) |
Publication date | 2006 |
Pages | 79-89 |
Publication status | Published - 2006 |
Externally published | Yes |
Event | Fourth Workshop on Intelligent Solutions in Embedded Systems (WISES 2006) - Duration: 1 Jan 2006 → … |
Conference
Conference | Fourth Workshop on Intelligent Solutions in Embedded Systems (WISES 2006) |
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Period | 01/01/2006 → … |