Abstract
In this paper, we propose a reconfigurable design of the Ad-vanced Encryption Standard capable of adapting at run-Time to the requirements of the target application. Reconfiguration is achieved by activating only a specific subset of all the instantiated processing elements. Further, we explore the effectiveness of power gating and clock gating methodologies to minimize the energy consumption of the processing elements not involved in computation.
| Original language | English |
|---|---|
| Title of host publication | Proceedings of the ACM International Conference on Computing Frontiers (CF '16) |
| Publisher | Association for Computing Machinery |
| Publication date | 2016 |
| Pages | 331-334 |
| ISBN (Print) | 978-1-4503-4128-8 |
| DOIs | |
| Publication status | Published - 2016 |
| Event | ACM International Conference on Computing Frontiers - Como, Italy Duration: 16 May 2016 → 18 May 2016 http://www.computingfrontiers.org/2016/ |
Conference
| Conference | ACM International Conference on Computing Frontiers |
|---|---|
| Country/Territory | Italy |
| City | Como |
| Period | 16/05/2016 → 18/05/2016 |
| Internet address |
UN SDGs
This output contributes to the following UN Sustainable Development Goals (SDGs)
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SDG 7 Affordable and Clean Energy
Keywords
- Low Energy
- AES
- Security
- Power Gating
- oarse-Grained Recon gurable Systems
- Run-time Adaptive Systems
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