A Unified Component Modeling Approach for Performance Estimation in Hardware/Software Codesign

Jesper Nicolai Riis Grode; Jan Madsen

doi:10.1109/EURMIC.1998.711778

A Unified Component Modeling Approach for Performance Estimation in Hardware/Software Codesign

Jesper Nicolai Riis Grode, Jan Madsen

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Abstract

This paper presents an approach for abstract modeling of hardware/software architectures using Hierarchical Colored Petri Nets. The approach is able to capture complex behavioral characteristics often seen in software and hardware architectures, thus it is suitable for high level codesign issues such as performance estimation. In this paper, the development of a model of the ARM7 processor [5] is described to illustrate the full potential of the modeling approach. To further illustrate the approach, a cache model is also described. The approach and related tools are currently being implemented in the LYCOS system [12]. Details and the basic characteristics of the approach can be found in [8].

Original language	English
Title of host publication	Euromicro Conference, 1998. Proceedings. 24th
Volume	1
Publisher	IEEE Computer Society Press
Publication date	1998
Pages	65-69
Article number	711778
ISBN (Print)	0-8186-8646-4
DOIs	https://doi.org/10.1109/EURMIC.1998.711778
Publication status	Published - 1998
Event	24th EUROMICRO Conference - Vasteras, Sweden Duration: 25 Aug 1998 → 27 Aug 1998 Conference number: 24

Conference

Conference	24th EUROMICRO Conference
Number	24
Country/Territory	Sweden
City	Vasteras
Period	25/08/1998 → 27/08/1998

Bibliographical note

Copyright: 1998 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE

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@inproceedings{5598624365594f97a3068e63f0305714,

title = "A Unified Component Modeling Approach for Performance Estimation in Hardware/Software Codesign",

abstract = "This paper presents an approach for abstract modeling of hardware/software architectures using Hierarchical Colored Petri Nets. The approach is able to capture complex behavioral characteristics often seen in software and hardware architectures, thus it is suitable for high level codesign issues such as performance estimation. In this paper, the development of a model of the ARM7 processor [5] is described to illustrate the full potential of the modeling approach. To further illustrate the approach, a cache model is also described. The approach and related tools are currently being implemented in the LYCOS system [12]. Details and the basic characteristics of the approach can be found in [8].",

author = "Grode, {Jesper Nicolai Riis} and Jan Madsen",

note = "Copyright: 1998 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE; 24th EUROMICRO Conference, EURMIC 1998 ; Conference date: 25-08-1998 Through 27-08-1998",

year = "1998",

doi = "10.1109/EURMIC.1998.711778",

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AU - Madsen, Jan

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N2 - This paper presents an approach for abstract modeling of hardware/software architectures using Hierarchical Colored Petri Nets. The approach is able to capture complex behavioral characteristics often seen in software and hardware architectures, thus it is suitable for high level codesign issues such as performance estimation. In this paper, the development of a model of the ARM7 processor [5] is described to illustrate the full potential of the modeling approach. To further illustrate the approach, a cache model is also described. The approach and related tools are currently being implemented in the LYCOS system [12]. Details and the basic characteristics of the approach can be found in [8].

AB - This paper presents an approach for abstract modeling of hardware/software architectures using Hierarchical Colored Petri Nets. The approach is able to capture complex behavioral characteristics often seen in software and hardware architectures, thus it is suitable for high level codesign issues such as performance estimation. In this paper, the development of a model of the ARM7 processor [5] is described to illustrate the full potential of the modeling approach. To further illustrate the approach, a cache model is also described. The approach and related tools are currently being implemented in the LYCOS system [12]. Details and the basic characteristics of the approach can be found in [8].

U2 - 10.1109/EURMIC.1998.711778

DO - 10.1109/EURMIC.1998.711778

M3 - Article in proceedings

SN - 0-8186-8646-4

VL - 1

SP - 65

EP - 69

BT - Euromicro Conference, 1998. Proceedings. 24th

PB - IEEE Computer Society Press

T2 - 24th EUROMICRO Conference

Y2 - 25 August 1998 through 27 August 1998

ER -

A Unified Component Modeling Approach for Performance Estimation in Hardware/Software Codesign

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