Abstract
Although digital filters based on the Residue Number System (RNS) show high performance and low power dissipation, RNS filters are not widely used in DSP systems, because of the complexity of the algorithms involved. We present a tool to design RNS FIR filters which hides the RNS algorithms to the designer, and generates a synthesizable VHDL description of the filter taking into account several design constraints such as: delay, area and energy.
| Original language | English |
|---|---|
| Title of host publication | Proceedings of 2004 IEEE Design, Automation and Test in Europe Conference (DATE) |
| Publisher | IEEE |
| Publication date | 2004 |
| Pages | 686-687 |
| ISBN (Print) | 0-7695-2085-5 |
| DOIs | |
| Publication status | Published - 2004 |
| Event | 2004 Design, Automation and Test in Europe Conference and Exhibition - Paris, France Duration: 16 Feb 2004 → 20 Feb 2004 |
Conference
| Conference | 2004 Design, Automation and Test in Europe Conference and Exhibition |
|---|---|
| Country/Territory | France |
| City | Paris |
| Period | 16/02/2004 → 20/02/2004 |
Fingerprint
Dive into the research topics of 'A tool for automatic generation of RTL-level VHDL description of RNS FIR filters'. Together they form a unique fingerprint.Cite this
- APA
- Author
- BIBTEX
- Harvard
- Standard
- RIS
- Vancouver