Although digital filters based on the Residue Number System (RNS) show high performance and low power dissipation, RNS filters are not widely used in DSP systems, because of the complexity of the algorithms involved. We present a tool to design RNS FIR filters which hides the RNS algorithms to the designer, and generates a synthesizable VHDL description of the filter taking into account several design constraints such as: delay, area and energy.
|Title of host publication||Proceedings of 2004 IEEE Design, Automation and Test in Europe Conference (DATE)|
|Publication status||Published - 2004|
|Event||2004 Design, Automation and Test in Europe Conference and Exhibition - Paris, France|
Duration: 16 Feb 2004 → 20 Feb 2004
|Conference||2004 Design, Automation and Test in Europe Conference and Exhibition|
|Period||16/02/2004 → 20/02/2004|