A Systematic Procedure for the Generation of Cost-Minimized Designs

Peter W. Becker, Bjorn Jarkler

Research output: Contribution to journalJournal articleResearchpeer-review

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Abstract

We present a procedure for the generation of cost-minimized designs of circuits and systems. Suppose a designer has decided upon the topology of his product. Also suppose he knows the cost and quality of the different grades of the N components required to implement the product. The designer then faces the following problem: How should he proceed to find the combination of grades that will give him the desired manufacturing yield at minimum product cost? We discuss the problem and suggest a policy by which the designer, with a reasonable computational effort, can find a set of ``good'' implementations. The suggested policy is applied to an electronic amplifier. The results are quite encouraging.
Original languageEnglish
JournalI E E E Transactions on Reliability
Volume21
Issue number1
Pages (from-to)41-45
ISSN0018-9529
DOIs
Publication statusPublished - 1972

Bibliographical note

Copyright: 1972 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE

Cite this

Becker, Peter W. ; Jarkler, Bjorn. / A Systematic Procedure for the Generation of Cost-Minimized Designs. In: I E E E Transactions on Reliability. 1972 ; Vol. 21, No. 1. pp. 41-45.
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A Systematic Procedure for the Generation of Cost-Minimized Designs. / Becker, Peter W.; Jarkler, Bjorn.

In: I E E E Transactions on Reliability, Vol. 21, No. 1, 1972, p. 41-45.

Research output: Contribution to journalJournal articleResearchpeer-review

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T1 - A Systematic Procedure for the Generation of Cost-Minimized Designs

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AU - Jarkler, Bjorn

N1 - Copyright: 1972 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE

PY - 1972

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N2 - We present a procedure for the generation of cost-minimized designs of circuits and systems. Suppose a designer has decided upon the topology of his product. Also suppose he knows the cost and quality of the different grades of the N components required to implement the product. The designer then faces the following problem: How should he proceed to find the combination of grades that will give him the desired manufacturing yield at minimum product cost? We discuss the problem and suggest a policy by which the designer, with a reasonable computational effort, can find a set of ``good'' implementations. The suggested policy is applied to an electronic amplifier. The results are quite encouraging.

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DO - 10.1109/TR.1972.5216170

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