A Single-Path Chip-Multiprocessor System

Martin Schoeberl, Peter Puschner, Raimund Kirner

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Abstract

. In this paper we explore the combination of a time-predictable chipmultiprocessor system with the single-path programming paradigm. Time-sliced arbitration of the main memory access provides time-predictable memory load and store instructions. Single-path programming avoids control flow dependent timing variations. To keep the execution time of tasks constant, even in the case of shared memory access of several processor cores, the tasks on the cores are synchronized with the time-sliced memory arbitration unit.
Original languageEnglish
Title of host publicationProceedings of the Seventh IFIP Workshop on Software Technologies for Future Embedded and Ubiquitous Systems (SEUS 2009)
Publication date2009
Pages47-57
Publication statusPublished - 2009
Externally publishedYes
EventSeventh IFIP Workshop on Software Technologies for Future Embedded and Ubiquitous Systems (SEUS 2009) - Newport Beach, (CA), United States
Duration: 16 Nov 200918 Nov 2009
Conference number: 7

Conference

ConferenceSeventh IFIP Workshop on Software Technologies for Future Embedded and Ubiquitous Systems (SEUS 2009)
Number7
CountryUnited States
CityNewport Beach, (CA)
Period16/11/200918/11/2009

Cite this

Schoeberl, M., Puschner, P., & Kirner, R. (2009). A Single-Path Chip-Multiprocessor System. In Proceedings of the Seventh IFIP Workshop on Software Technologies for Future Embedded and Ubiquitous Systems (SEUS 2009) (pp. 47-57)