A New Approach to Optimal Cell Synthesis

Jan Madsen

doi:10.1109/ICCAD.1989.76965

A New Approach to Optimal Cell Synthesis

Jan Madsen

Research output: Chapter in Book/Report/Conference proceeding › Article in proceedings › Research › peer-review

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Abstract

A set of algorithms is presented for optimal layout generation of CMOS complex gates. The algorithms are able to handle global physical constraints, such as pin placement, and to capture timing aspects. Results show that this novel approach provides better solutions in area and speed compared t other methods. The algorithms have been implemented in a cell compiler (CELLO) working in an experimental silicon compiler environment.

Original language	English
Title of host publication	Proceedings of the IEEE International Conference on Computer-Aided Design, ICCAD-89
Publisher	IEEE
Publication date	1989
ISBN (Print)	0-8186-1986-4
DOIs	https://doi.org/10.1109/ICCAD.1989.76965
Publication status	Published - 1989
Event	International Conference on Computer-Aided Design - Santa Clara, CA Duration: 1 Jan 1989 → …

Conference

Conference	International Conference on Computer-Aided Design
City	Santa Clara, CA
Period	01/01/1989 → …

Bibliographical note

Copyright 1989 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.

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10.1109/ICCAD.1989.76965

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abstract = "A set of algorithms is presented for optimal layout generation of CMOS complex gates. The algorithms are able to handle global physical constraints, such as pin placement, and to capture timing aspects. Results show that this novel approach provides better solutions in area and speed compared t other methods. The algorithms have been implemented in a cell compiler (CELLO) working in an experimental silicon compiler environment.",

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AB - A set of algorithms is presented for optimal layout generation of CMOS complex gates. The algorithms are able to handle global physical constraints, such as pin placement, and to capture timing aspects. Results show that this novel approach provides better solutions in area and speed compared t other methods. The algorithms have been implemented in a cell compiler (CELLO) working in an experimental silicon compiler environment.

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DO - 10.1109/ICCAD.1989.76965

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A New Approach to Optimal Cell Synthesis

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