Abstract
In this work, we present a radix-16 multi-format multiplier to multiply 64-bit unsigned integer operands, doubleprecision and single-precision operands. The multiplier is sectioned in two lanes such that two single-precision multiplications can be computed in parallel. Radix-16 is chosen for the reduced number of partial products and the resulting power savings. The experimental results show that high power efficiency is obtained by issuing two single-precision multiplications per cycle. Moreover, by converting the double-precision numbers which fit to single-precision, further energy can be saved
| Original language | English |
|---|---|
| Title of host publication | Proceedings of the 30th IEEE International System-on-Chip Conference |
| Publisher | IEEE |
| Publication date | 2017 |
| Pages | 351-356 |
| ISBN (Print) | 9781538640333 |
| DOIs | |
| Publication status | Published - 2017 |
| Event | 2017 30th IEEE International System-on-Chip Conference - Hotel Novotel München City, München, Germany Duration: 5 Sept 2017 → 8 Sept 2017 Conference number: 30 https://ieeexplore.ieee.org/xpl/conhome/8170502/proceeding |
Conference
| Conference | 2017 30th IEEE International System-on-Chip Conference |
|---|---|
| Number | 30 |
| Location | Hotel Novotel München City |
| Country/Territory | Germany |
| City | München |
| Period | 05/09/2017 → 08/09/2017 |
| Internet address |