Abstract
| Original language | English |
|---|---|
| Title of host publication | Proceedings of 2019 IEEE Nordic Circuits and Systems Conference |
| Number of pages | 6 |
| Publisher | IEEE |
| Publication date | 2019 |
| Pages | 1-6 |
| ISBN (Print) | 9781728127699 |
| DOIs | |
| Publication status | Published - 2019 |
| Event | 2019 IEEE Nordic Circuits and Systems Conference - Helsinki, Finland Duration: 29 Oct 2019 → 30 Oct 2019 https://events.tuni.fi/norcas2019/ |
Conference
| Conference | 2019 IEEE Nordic Circuits and Systems Conference |
|---|---|
| Country | Finland |
| City | Helsinki |
| Period | 29/10/2019 → 30/10/2019 |
| Internet address |
| Series | 2019 Ieee Nordic Circuits and Systems Conference (norcas): Norchip and International Symposium of System-on-chip (soc) |
|---|
Keywords
- Fault-tolerance
- Triple-modular redundancy
- Lock-step
- Single event upsets
- Time-predictable architecture
Cite this
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A Fault-Tolerant Time-Predictable Processor. / Gkiokas, Christos; Schoeberl, Martin.
Proceedings of 2019 IEEE Nordic Circuits and Systems Conference. IEEE, 2019. p. 1-6 (2019 Ieee Nordic Circuits and Systems Conference (norcas): Norchip and International Symposium of System-on-chip (soc)).Research output: Chapter in Book/Report/Conference proceeding › Article in proceedings › Research › peer-review
TY - GEN
T1 - A Fault-Tolerant Time-Predictable Processor
AU - Gkiokas, Christos
AU - Schoeberl, Martin
PY - 2019
Y1 - 2019
N2 - Advancements in commercial space applications have increased interest in deploying FPGA devices with soft processors on satellite systems. Processors are a vital component in all satellite payloads used for control functions and on-board data processing. However, a high integration level within an FPGA causes high sensitivity to ionising radiation-induced errors, requiring mitigation for single event effects to ensure reliable operation. In this paper, a triple-core lock-step processor for radiation-induced soft-errors mitigation is presented that aims to reduce the probability of a processor failure due to soft-errors. Aerospace applications are also defined by strict real-time requirements for processors, thus the design is implemented using Patmos, a time-predictable processor of the T-CREST multicore research platform.
AB - Advancements in commercial space applications have increased interest in deploying FPGA devices with soft processors on satellite systems. Processors are a vital component in all satellite payloads used for control functions and on-board data processing. However, a high integration level within an FPGA causes high sensitivity to ionising radiation-induced errors, requiring mitigation for single event effects to ensure reliable operation. In this paper, a triple-core lock-step processor for radiation-induced soft-errors mitigation is presented that aims to reduce the probability of a processor failure due to soft-errors. Aerospace applications are also defined by strict real-time requirements for processors, thus the design is implemented using Patmos, a time-predictable processor of the T-CREST multicore research platform.
KW - Fault-tolerance
KW - Triple-modular redundancy
KW - Lock-step
KW - Single event upsets
KW - Time-predictable architecture
U2 - 10.1109/norchip.2019.8906947
DO - 10.1109/norchip.2019.8906947
M3 - Article in proceedings
SN - 9781728127699
T3 - 2019 Ieee Nordic Circuits and Systems Conference (norcas): Norchip and International Symposium of System-on-chip (soc)
SP - 1
EP - 6
BT - Proceedings of 2019 IEEE Nordic Circuits and Systems Conference
PB - IEEE
ER -