A Fault-Tolerant Time-Predictable Processor

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Abstract

Advancements in commercial space applications have increased interest in deploying FPGA devices with soft processors on satellite systems. Processors are a vital component in all satellite payloads used for control functions and on-board data processing. However, a high integration level within an FPGA causes high sensitivity to ionising radiation-induced errors, requiring mitigation for single event effects to ensure reliable operation. In this paper, a triple-core lock-step processor for radiation-induced soft-errors mitigation is presented that aims to reduce the probability of a processor failure due to soft-errors. Aerospace applications are also defined by strict real-time requirements for processors, thus the design is implemented using Patmos, a time-predictable processor of the T-CREST multicore research platform.
Original languageEnglish
Title of host publicationProceedings of 2019 IEEE Nordic Circuits and Systems Conference
Number of pages6
PublisherIEEE
Publication date2019
Pages1-6
ISBN (Print)9781728127699
DOIs
Publication statusPublished - 2019
Event2019 IEEE Nordic Circuits and Systems Conference - Helsinki, Finland
Duration: 29 Oct 201930 Oct 2019
https://events.tuni.fi/norcas2019/

Conference

Conference2019 IEEE Nordic Circuits and Systems Conference
CountryFinland
CityHelsinki
Period29/10/201930/10/2019
Internet address
Series2019 Ieee Nordic Circuits and Systems Conference (norcas): Norchip and International Symposium of System-on-chip (soc)

Keywords

  • Fault-tolerance
  • Triple-modular redundancy
  • Lock-step
  • Single event upsets
  • Time-predictable architecture

Cite this

Gkiokas, C., & Schoeberl, M. (2019). A Fault-Tolerant Time-Predictable Processor. In Proceedings of 2019 IEEE Nordic Circuits and Systems Conference (pp. 1-6). IEEE. 2019 Ieee Nordic Circuits and Systems Conference (norcas): Norchip and International Symposium of System-on-chip (soc) https://doi.org/10.1109/norchip.2019.8906947