A Continuous-Time Delta-Sigma ADC for Portable Ultrasound Scanners

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Abstract

A fully differential fourth-order 1-bit continuous-time delta-sigma ADC designed in a 65nm process for portable ultrasound scanners is presented in this paper. The circuit design, implementation and measurements on the fabricated die are shown. The loop filter consists of RC-integrators, programmable capacitor arrays, resistors and voltage feedback DACs. The quantizer contains a pulse generator, a high-speed clocked comparator and a pull-down clocked latch to ensure constant delay in the feedback loop. Using this implementation, a small and low-power solution required for portable ultrasound scanner applications is achieved. The converter has a supply voltage of 1.2V, a bandwidth of 10MHz and an oversampling ratio of 16 leading to an operating frequency of 320MHz. The design occupies a die area of 0.0175mm2. Simulations with extracted parasitics show a SNR of 45.2dB and a current consumption of 489 µA. However, by adding a model of the measurement setup used, the performance degrades to 42.1dB. The measured SNR and current consumption are 41.6dB and 495 µA, which closely fit with the expected simulations. Several dies have been measured, and an estimation of the die spread distribution is given.
Original languageEnglish
JournalAnalog Integrated Circuits and Signal Processing
Volume92
Issue number3
Pages (from-to)393-402
Number of pages10
ISSN0925-1030
DOIs
Publication statusPublished - 2017

Keywords

  • Ultrasound
  • Portable
  • Scanners
  • Integrated
  • Continuous-Time
  • Delta-Sigma
  • ADC

Cite this

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title = "A Continuous-Time Delta-Sigma ADC for Portable Ultrasound Scanners",
abstract = "A fully differential fourth-order 1-bit continuous-time delta-sigma ADC designed in a 65nm process for portable ultrasound scanners is presented in this paper. The circuit design, implementation and measurements on the fabricated die are shown. The loop filter consists of RC-integrators, programmable capacitor arrays, resistors and voltage feedback DACs. The quantizer contains a pulse generator, a high-speed clocked comparator and a pull-down clocked latch to ensure constant delay in the feedback loop. Using this implementation, a small and low-power solution required for portable ultrasound scanner applications is achieved. The converter has a supply voltage of 1.2V, a bandwidth of 10MHz and an oversampling ratio of 16 leading to an operating frequency of 320MHz. The design occupies a die area of 0.0175mm2. Simulations with extracted parasitics show a SNR of 45.2dB and a current consumption of 489 µA. However, by adding a model of the measurement setup used, the performance degrades to 42.1dB. The measured SNR and current consumption are 41.6dB and 495 µA, which closely fit with the expected simulations. Several dies have been measured, and an estimation of the die spread distribution is given.",
keywords = "Ultrasound, Portable, Scanners, Integrated, Continuous-Time, Delta-Sigma , ADC",
author = "{Llimos Muntal}, Pere and J{\o}rgensen, {Ivan Harald Holger} and Erik Bruun",
year = "2017",
doi = "10.1007/s10470-017-1004-5",
language = "English",
volume = "92",
pages = "393--402",
journal = "Analog Integrated Circuits and Signal Processing",
issn = "0925-1030",
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A Continuous-Time Delta-Sigma ADC for Portable Ultrasound Scanners. / Llimos Muntal, Pere; Jørgensen, Ivan Harald Holger; Bruun, Erik.

In: Analog Integrated Circuits and Signal Processing, Vol. 92, No. 3, 2017, p. 393-402.

Research output: Contribution to journalJournal articleResearchpeer-review

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N2 - A fully differential fourth-order 1-bit continuous-time delta-sigma ADC designed in a 65nm process for portable ultrasound scanners is presented in this paper. The circuit design, implementation and measurements on the fabricated die are shown. The loop filter consists of RC-integrators, programmable capacitor arrays, resistors and voltage feedback DACs. The quantizer contains a pulse generator, a high-speed clocked comparator and a pull-down clocked latch to ensure constant delay in the feedback loop. Using this implementation, a small and low-power solution required for portable ultrasound scanner applications is achieved. The converter has a supply voltage of 1.2V, a bandwidth of 10MHz and an oversampling ratio of 16 leading to an operating frequency of 320MHz. The design occupies a die area of 0.0175mm2. Simulations with extracted parasitics show a SNR of 45.2dB and a current consumption of 489 µA. However, by adding a model of the measurement setup used, the performance degrades to 42.1dB. The measured SNR and current consumption are 41.6dB and 495 µA, which closely fit with the expected simulations. Several dies have been measured, and an estimation of the die spread distribution is given.

AB - A fully differential fourth-order 1-bit continuous-time delta-sigma ADC designed in a 65nm process for portable ultrasound scanners is presented in this paper. The circuit design, implementation and measurements on the fabricated die are shown. The loop filter consists of RC-integrators, programmable capacitor arrays, resistors and voltage feedback DACs. The quantizer contains a pulse generator, a high-speed clocked comparator and a pull-down clocked latch to ensure constant delay in the feedback loop. Using this implementation, a small and low-power solution required for portable ultrasound scanner applications is achieved. The converter has a supply voltage of 1.2V, a bandwidth of 10MHz and an oversampling ratio of 16 leading to an operating frequency of 320MHz. The design occupies a die area of 0.0175mm2. Simulations with extracted parasitics show a SNR of 45.2dB and a current consumption of 489 µA. However, by adding a model of the measurement setup used, the performance degrades to 42.1dB. The measured SNR and current consumption are 41.6dB and 495 µA, which closely fit with the expected simulations. Several dies have been measured, and an estimation of the die spread distribution is given.

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