A Constraint Logic Programming Framework for the Synthesis of Fault-Tolerant Schedules for Distributed Embedded Systems

Kåre Harbo Poulsen; Paul Pop; Viacheslav Izosimov

doi:10.1109/EFTA.2007.4416850

A Constraint Logic Programming Framework for the Synthesis of Fault-Tolerant Schedules for Distributed Embedded Systems

Kåre Harbo Poulsen, Paul Pop, Viacheslav Izosimov

Research output: Chapter in Book/Report/Conference proceeding › Article in proceedings › Research › peer-review

601 Downloads (Pure)

Abstract

We present a constraint logic programming (CLP) approach for synthesis of fault-tolerant hard real-time applications on distributed heterogeneous architectures. We address time-triggered systems, where processes and messages are statically scheduled based on schedule tables. We use process re-execution for recovering from multiple transient faults. We propose three scheduling approaches, which each present a trade-off between schedule simplicity and performance, (i) full transparency, (ii) slack sharing and (iii) conditional, and provide various degrees of transparency. We have developed a CLP framework that produces the fault-tolerant schedules, guaranteeing schedulability in the presence of transient faults. We show how the framework can be used to tackle design optimization problems.The proposed approach has been evaluated using extensive experiments.

Original language	English
Title of host publication	Work in Progress Proceedings of 12th IEEE Conference on Emerging Technologies and Factory Automation
Place of Publication	Patras
Publisher	IEEE
Publication date	2007
Pages	756-759
ISBN (Print)	9781424408252
DOIs	https://doi.org/10.1109/EFTA.2007.4416850
Publication status	Published - 2007
Event	12th IEEE Conference on Emerging Technologies and Factory Automation - Patras, Greece Duration: 25 Sept 2007 → 28 Sept 2007 Conference number: 12 http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=4416742

Conference

Conference	12th IEEE Conference on Emerging Technologies and Factory Automation
Number	12
Country/Territory	Greece
City	Patras
Period	25/09/2007 → 28/09/2007
Internet address	http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=4416742

Bibliographical note

Copyright note for papers published by the IEEE Computer Society: Copyright IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works, must be obtained from the IEEE.

Keywords

software fault tolerance
embedded systems
constraint handling
safety-critical software

Access to Document

10.1109/EFTA.2007.4416850

Pop codes07Final published version, 136 KB
Poulsen etfa07Final published version, 290 KB
Poulsen etfa07Final published version, 376 KB
Poulsen etfa07Final published version, 337 KB

OpenUrl availability

Full text

Cite this

@inproceedings{15b333ed4daf4b5bad73243d1ce5dfcc,

title = "A Constraint Logic Programming Framework for the Synthesis of Fault-Tolerant Schedules for Distributed Embedded Systems",

abstract = "We present a constraint logic programming (CLP) approach for synthesis of fault-tolerant hard real-time applications on distributed heterogeneous architectures. We address time-triggered systems, where processes and messages are statically scheduled based on schedule tables. We use process re-execution for recovering from multiple transient faults. We propose three scheduling approaches, which each present a trade-off between schedule simplicity and performance, (i) full transparency, (ii) slack sharing and (iii) conditional, and provide various degrees of transparency. We have developed a CLP framework that produces the fault-tolerant schedules, guaranteeing schedulability in the presence of transient faults. We show how the framework can be used to tackle design optimization problems.The proposed approach has been evaluated using extensive experiments.",

keywords = "software fault tolerance, embedded systems, constraint handling, safety-critical software",

author = "Poulsen, {K{\aa}re Harbo} and Paul Pop and Viacheslav Izosimov",

note = "Copyright note for papers published by the IEEE Computer Society: Copyright IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works, must be obtained from the IEEE.; 12th IEEE Conference on Emerging Technologies and Factory Automation, ETFA ; Conference date: 25-09-2007 Through 28-09-2007",

year = "2007",

doi = "10.1109/EFTA.2007.4416850",

language = "English",

isbn = "9781424408252",

pages = "756--759",

booktitle = "Work in Progress Proceedings of 12th IEEE Conference on Emerging Technologies and Factory Automation",

publisher = "IEEE",

address = "United States",

url = "http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=4416742",

}

Poulsen, KH, Pop, P & Izosimov, V 2007, A Constraint Logic Programming Framework for the Synthesis of Fault-Tolerant Schedules for Distributed Embedded Systems. in Work in Progress Proceedings of 12th IEEE Conference on Emerging Technologies and Factory Automation. IEEE, Patras, pp. 756-759, 12th IEEE Conference on Emerging Technologies and Factory Automation, Patras, Greece, 25/09/2007. https://doi.org/10.1109/EFTA.2007.4416850

A Constraint Logic Programming Framework for the Synthesis of Fault-Tolerant Schedules for Distributed Embedded Systems. / Poulsen, Kåre Harbo; Pop, Paul; Izosimov, Viacheslav.
Work in Progress Proceedings of 12th IEEE Conference on Emerging Technologies and Factory Automation. Patras: IEEE, 2007. p. 756-759.

Research output: Chapter in Book/Report/Conference proceeding › Article in proceedings › Research › peer-review

TY - GEN

T1 - A Constraint Logic Programming Framework for the Synthesis of Fault-Tolerant Schedules for Distributed Embedded Systems

AU - Poulsen, Kåre Harbo

AU - Pop, Paul

AU - Izosimov, Viacheslav

N1 - Conference code: 12

PY - 2007

Y1 - 2007

N2 - We present a constraint logic programming (CLP) approach for synthesis of fault-tolerant hard real-time applications on distributed heterogeneous architectures. We address time-triggered systems, where processes and messages are statically scheduled based on schedule tables. We use process re-execution for recovering from multiple transient faults. We propose three scheduling approaches, which each present a trade-off between schedule simplicity and performance, (i) full transparency, (ii) slack sharing and (iii) conditional, and provide various degrees of transparency. We have developed a CLP framework that produces the fault-tolerant schedules, guaranteeing schedulability in the presence of transient faults. We show how the framework can be used to tackle design optimization problems.The proposed approach has been evaluated using extensive experiments.

AB - We present a constraint logic programming (CLP) approach for synthesis of fault-tolerant hard real-time applications on distributed heterogeneous architectures. We address time-triggered systems, where processes and messages are statically scheduled based on schedule tables. We use process re-execution for recovering from multiple transient faults. We propose three scheduling approaches, which each present a trade-off between schedule simplicity and performance, (i) full transparency, (ii) slack sharing and (iii) conditional, and provide various degrees of transparency. We have developed a CLP framework that produces the fault-tolerant schedules, guaranteeing schedulability in the presence of transient faults. We show how the framework can be used to tackle design optimization problems.The proposed approach has been evaluated using extensive experiments.

KW - software fault tolerance

KW - embedded systems

KW - constraint handling

KW - safety-critical software

U2 - 10.1109/EFTA.2007.4416850

DO - 10.1109/EFTA.2007.4416850

M3 - Article in proceedings

SN - 9781424408252

SP - 756

EP - 759

BT - Work in Progress Proceedings of 12th IEEE Conference on Emerging Technologies and Factory Automation

PB - IEEE

CY - Patras

T2 - 12th IEEE Conference on Emerging Technologies and Factory Automation

Y2 - 25 September 2007 through 28 September 2007

ER -

A Constraint Logic Programming Framework for the Synthesis of Fault-Tolerant Schedules for Distributed Embedded Systems

Abstract

Conference

Bibliographical note

Keywords

Access to Document

OpenUrl availability

Fingerprint

Cite this