We present a constraint logic programming (CLP) approach for synthesis of fault-tolerant hard real-time applications on distributed heterogeneous architectures. We address time-triggered systems, where processes and messages are statically scheduled based on schedule tables. We use process re-execution for recovering from multiple transient faults. We propose three scheduling approaches, which each present a trade-off between schedule simplicity and performance, (i) full transparency, (ii) slack sharing and (iii) conditional, and provide various degrees of transparency. We have developed a CLP framework that produces the fault-tolerant schedules, guaranteeing schedulability in the presence of transient faults. We show how the framework can be used to tackle design optimization problems.The proposed approach has been evaluated using extensive experiments.
|Title of host publication||Work in Progress Proceedings of 12th IEEE Conference on Emerging Technologies and Factory Automation|
|Place of Publication||Patras|
|Publication status||Published - 2007|
|Event||12th IEEE Conference on Emerging Technologies and Factory Automation - Patras, Greece|
Duration: 25 Sep 2007 → 28 Sep 2007
Conference number: 12
|Conference||12th IEEE Conference on Emerging Technologies and Factory Automation|
|Period||25/09/2007 → 28/09/2007|
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- software fault tolerance
- embedded systems
- constraint handling
- safety-critical software