A configurable FPGA FEC unit for Tb/s optical communication

Jakob Dahl Andersen; Knud J. Larsen; Christian Bering Bøgh; Søren Forchhammer; Francesco Da Ros; Kjeld Dalgaard; Shajeel Iqbal

doi:10.1109/ICC.2017.7996767

A configurable FPGA FEC unit for Tb/s optical communication

Jakob Dahl Andersen, Knud J. Larsen, Christian Bering Bøgh, Søren Forchhammer, Francesco Da Ros, Kjeld Dalgaard, Shajeel Iqbal

Research output: Chapter in Book/Report/Conference proceeding › Article in proceedings › Research › peer-review

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Abstract

Decoding of FEC (forward error correction) for optical communication beyond 1 Tb/s is investigated. A configurable single FPGA solution is presented having configurations supporting bit-rates in the range from 40 Gb/s to 1.6 Tb/s. The design allows for trade-offs of bit-rate, footprint, and latency within the resources of the FPGA. A proof-of-concept lab experiment at 40 Gb/s was conducted and pre-FEC — post-FEC performance validated with simulated results.

Original language	English
Title of host publication	Proceedings of 2017 IEEE International Conference on Communications
Number of pages	6
Publisher	IEEE
Publication date	2017
Pages	1-6
ISBN (Print)	9781467389990
DOIs	https://doi.org/10.1109/ICC.2017.7996767
Publication status	Published - 2017
Event	2017 IEEE International Conference on Communications - Palais des Congrès - Porte Maillot, Paris, France Duration: 21 May 2017 → 25 May 2017

Conference

Conference	2017 IEEE International Conference on Communications
Location	Palais des Congrès - Porte Maillot
Country	France
City	Paris
Period	21/05/2017 → 25/05/2017

Series	I E E E International Conference on Communications
ISSN	1550-3607

Keywords

Optical fiber networks
HD-FEC
Beyond 1 Tb/s
Product codes
Optical communication

Access to Document

10.1109/ICC.2017.7996767

ICC17 2102 revision submittedAccepted author manuscript, 473 KB

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Cite this

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title = "A configurable FPGA FEC unit for Tb/s optical communication",

abstract = "Decoding of FEC (forward error correction) for optical communication beyond 1 Tb/s is investigated. A configurable single FPGA solution is presented having configurations supporting bit-rates in the range from 40 Gb/s to 1.6 Tb/s. The design allows for trade-offs of bit-rate, footprint, and latency within the resources of the FPGA. A proof-of-concept lab experiment at 40 Gb/s was conducted and pre-FEC — post-FEC performance validated with simulated results.",

keywords = "Optical fiber networks, HD-FEC, Beyond 1 Tb/s, Product codes, Optical communication",

author = "Andersen, {Jakob Dahl} and Larsen, {Knud J.} and {Bering B{\o}gh}, Christian and S{\o}ren Forchhammer and {Da Ros}, Francesco and Kjeld Dalgaard and Shajeel Iqbal",

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language = "English",

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series = "I E E E International Conference on Communications",

publisher = "IEEE",

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note = "2017 IEEE International Conference on Communications, ICC 2017 ; Conference date: 21-05-2017 Through 25-05-2017",

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Andersen, JD , Larsen, KJ, Bering Bøgh, C, Forchhammer, S , Da Ros, F , Dalgaard, K & Iqbal, S 2017, A configurable FPGA FEC unit for Tb/s optical communication. in Proceedings of 2017 IEEE International Conference on Communications. IEEE, I E E E International Conference on Communications, pp. 1-6, 2017 IEEE International Conference on Communications, Paris, France, 21/05/2017. https://doi.org/10.1109/ICC.2017.7996767

A configurable FPGA FEC unit for Tb/s optical communication. / Andersen, Jakob Dahl ; Larsen, Knud J.; Bering Bøgh, Christian; Forchhammer, Søren ; Da Ros, Francesco ; Dalgaard, Kjeld ; Iqbal, Shajeel.

Proceedings of 2017 IEEE International Conference on Communications. IEEE, 2017. p. 1-6 (I E E E International Conference on Communications).

Research output: Chapter in Book/Report/Conference proceeding › Article in proceedings › Research › peer-review

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AU - Da Ros, Francesco

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AU - Iqbal, Shajeel

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KW - Product codes

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