A 6.2 mW 0.024 mm2 fully-passive RF downconverter with 12 dB gain enhancement using MOS parametric amplification

This paper describes a fully-passive discrete-time switched-capacitor RF downconverter with an on-chip oscillator, that combines quadrature mixing and harmonic rejection, designed in a 130 nm digital CMOS technology. By using MOS capacitors (varactors) to perform parametric amplification, it is possible to achieve a measured gain enhancement of about 12 dB, together with 21 dB noise figure and more than 5 dBm IIP3. Operating in the VHF-III band, the downconverter core dissipates 6.2 mW and occupies 0.024 mm2.