A 36 nW trimless voltage reference with low sensitivity to PVT variations

Calvin Maxsen; Pere Llimos Muntal; Gunnar Gudnason; Ivan Harald Holger Jørgensen

doi:10.1109/NORCHIP.2019.8906943

A 36 nW trimless voltage reference with low sensitivity to PVT variations

Calvin Maxsen
, Pere Llimos Muntal
, Gunnar Gudnason
, Ivan Harald Holger Jørgensen

Technical University of Denmark
Demant A/S

Research output: Chapter in Book/Report/Conference proceeding › Article in proceedings › Research › peer-review

786 Downloads (Orbit)

Abstract

In this paper a trimless ultra-low-power voltage reference with low sensitivity to process, voltage and temperature (PVT) is presented. The design uses a cascaded proportional to absolute temperature (PTAT) voltage generator to produce a voltage independent of process and line variations. The voltage is compensated in temperature by using a temperature-dependent current-load that changes the bias point of the voltage generator. The voltage reference is simulated over PVT in a 28nm FD-SOI process and a mean value of 386mV with absolute accuracy of ±3.8% is found. Spread across process corners is 4.7% (3σ/µ). Power consumption is 36nW at 25◦C and 0.8V. Line sensitivity is better than 0.14%/V and the worst temperature coefﬁcient (T.C.) from 0◦C to 60◦C is 91.8ppm/◦C.

Original language	English
Title of host publication	Proceedings of 2019 IEEE Nordic Circuits and Systems Conference
Number of pages	5
Publisher	IEEE
Publication date	2020
ISBN (Electronic)	978-1-7281-2769-9
DOIs	https://doi.org/10.1109/NORCHIP.2019.8906943
Publication status	Published - 2020
Event	2019 IEEE Nordic Circuits and Systems Conference - Helsinki, Finland Duration: 29 Oct 2019 → 30 Oct 2019 https://events.tuni.fi/norcas2019/ https://ieeexplore.ieee.org/xpl/conhome/8894146/proceeding

Conference

Conference	2019 IEEE Nordic Circuits and Systems Conference
Country/Territory	Finland
City	Helsinki
Period	29/10/2019 → 30/10/2019
Sponsor	IEEE, Tampere University
Internet address	https://events.tuni.fi/norcas2019/ https://ieeexplore.ieee.org/xpl/conhome/8894146/proceeding

Access to Document

10.1109/NORCHIP.2019.8906943

FulltextAccepted author manuscript, 526 KB

OpenUrl availability

Check availability in DTU Findit

Cite this

@inproceedings{390dd780ea0c4c45ad36bf6c51341fb0,

title = "A 36 nW trimless voltage reference with low sensitivity to PVT variations",

abstract = "In this paper a trimless ultra-low-power voltage reference with low sensitivity to process, voltage and temperature (PVT) is presented. The design uses a cascaded proportional to absolute temperature (PTAT) voltage generator to produce a voltage independent of process and line variations. The voltage is compensated in temperature by using a temperature-dependent current-load that changes the bias point of the voltage generator. The voltage reference is simulated over PVT in a 28nm FD-SOI process and a mean value of 386mV with absolute accuracy of ±3.8\% is found. Spread across process corners is 4.7\% (3σ/µ). Power consumption is 36nW at 25◦C and 0.8V. Line sensitivity is better than 0.14\%/V and the worst temperature coefﬁcient (T.C.) from 0◦C to 60◦C is 91.8ppm/◦C. ",

author = "Calvin Maxsen and \{Llimos Muntal\}, Pere and Gunnar Gudnason and J{\o}rgensen, \{Ivan Harald Holger\}",

year = "2020",

doi = "10.1109/NORCHIP.2019.8906943",

language = "English",

booktitle = "Proceedings of 2019 IEEE Nordic Circuits and Systems Conference",

publisher = "IEEE",

address = "United States",

note = "2019 IEEE Nordic Circuits and Systems Conference, NORCAS 2019 ; Conference date: 29-10-2019 Through 30-10-2019",

url = "https://events.tuni.fi/norcas2019/, https://ieeexplore.ieee.org/xpl/conhome/8894146/proceeding",

}

TY - GEN

T1 - A 36 nW trimless voltage reference with low sensitivity to PVT variations

AU - Maxsen, Calvin

AU - Llimos Muntal, Pere

AU - Gudnason, Gunnar

AU - Jørgensen, Ivan Harald Holger

PY - 2020

Y1 - 2020

N2 - In this paper a trimless ultra-low-power voltage reference with low sensitivity to process, voltage and temperature (PVT) is presented. The design uses a cascaded proportional to absolute temperature (PTAT) voltage generator to produce a voltage independent of process and line variations. The voltage is compensated in temperature by using a temperature-dependent current-load that changes the bias point of the voltage generator. The voltage reference is simulated over PVT in a 28nm FD-SOI process and a mean value of 386mV with absolute accuracy of ±3.8% is found. Spread across process corners is 4.7% (3σ/µ). Power consumption is 36nW at 25◦C and 0.8V. Line sensitivity is better than 0.14%/V and the worst temperature coefﬁcient (T.C.) from 0◦C to 60◦C is 91.8ppm/◦C.

AB - In this paper a trimless ultra-low-power voltage reference with low sensitivity to process, voltage and temperature (PVT) is presented. The design uses a cascaded proportional to absolute temperature (PTAT) voltage generator to produce a voltage independent of process and line variations. The voltage is compensated in temperature by using a temperature-dependent current-load that changes the bias point of the voltage generator. The voltage reference is simulated over PVT in a 28nm FD-SOI process and a mean value of 386mV with absolute accuracy of ±3.8% is found. Spread across process corners is 4.7% (3σ/µ). Power consumption is 36nW at 25◦C and 0.8V. Line sensitivity is better than 0.14%/V and the worst temperature coefﬁcient (T.C.) from 0◦C to 60◦C is 91.8ppm/◦C.

U2 - 10.1109/NORCHIP.2019.8906943

DO - 10.1109/NORCHIP.2019.8906943

M3 - Article in proceedings

BT - Proceedings of 2019 IEEE Nordic Circuits and Systems Conference

PB - IEEE

T2 - 2019 IEEE Nordic Circuits and Systems Conference

Y2 - 29 October 2019 through 30 October 2019

ER -

A 36 nW trimless voltage reference with low sensitivity to PVT variations

Abstract

Conference

Access to Document

OpenUrl availability

Fingerprint

Cite this