A 36 nW trimless voltage reference with low sensitivity to PVT variations

Calvin Maxsen, Pere Llimos Muntal, Gunnar Gudnason, Ivan Harald Holger Jørgensen

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    Abstract

    In this paper a trimless ultra-low-power voltage reference with low sensitivity to process, voltage and temperature (PVT) is presented. The design uses a cascaded proportional to absolute temperature (PTAT) voltage generator to produce a voltage independent of process and line variations. The voltage is compensated in temperature by using a temperature-dependent current-load that changes the bias point of the voltage generator. The voltage reference is simulated over PVT in a 28nm FD-SOI process and a mean value of 386mV with absolute accuracy of ±3.8% is found. Spread across process corners is 4.7% (3σ/µ). Power consumption is 36nW at 25◦C and 0.8V. Line sensitivity is better than 0.14%/V and the worst temperature coefficient (T.C.) from 0◦C to 60◦C is 91.8ppm/◦C.
    Original languageEnglish
    Title of host publicationProceedings of 2019 IEEE Nordic Circuits and Systems Conference
    Number of pages5
    PublisherIEEE
    Publication date2020
    ISBN (Electronic)978-1-7281-2769-9
    DOIs
    Publication statusPublished - 2020
    Event2019 IEEE Nordic Circuits and Systems Conference - Helsinki, Finland
    Duration: 29 Oct 201930 Oct 2019
    https://events.tuni.fi/norcas2019/
    https://ieeexplore.ieee.org/xpl/conhome/8894146/proceeding

    Conference

    Conference2019 IEEE Nordic Circuits and Systems Conference
    Country/TerritoryFinland
    CityHelsinki
    Period29/10/201930/10/2019
    SponsorIEEE, Tampere University
    Internet address

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