In this paper a trimless ultra-low-power voltage reference with low sensitivity to process, voltage and temperature (PVT) is presented. The design uses a cascaded proportional to absolute temperature (PTAT) voltage generator to produce a voltage independent of process and line variations. The voltage is compensated in temperature by using a temperature-dependent current-load that changes the bias point of the voltage generator. The voltage reference is simulated over PVT in a 28nm FD-SOI process and a mean value of 386mV with absolute accuracy of ±3.8% is found. Spread across process corners is 4.7% (3σ/µ). Power consumption is 36nW at 25◦C and 0.8V. Line sensitivity is better than 0.14%/V and the worst temperature coefﬁcient (T.C.) from 0◦C to 60◦C is 91.8ppm/◦C.
|Title of host publication||Proceedings of 2019 IEEE Nordic Circuits and Systems Conference|
|Number of pages||5|
|Publication status||Accepted/In press - 2020|
|Event||2019 IEEE Nordic Circuits and Systems Conference - Helsinki, Finland|
Duration: 29 Oct 2019 → 30 Oct 2019
|Conference||2019 IEEE Nordic Circuits and Systems Conference|
|Period||29/10/2019 → 30/10/2019|
Maxsen, C., Llimos Muntal, P., Gudnason, G., & Jørgensen, I. H. H. (Accepted/In press). A 36 nW trimless voltage reference with low sensitivity to PVT variations. In Proceedings of 2019 IEEE Nordic Circuits and Systems Conference IEEE.