A 36 nW trimless voltage reference with low sensitivity to PVT variations

Calvin Maxsen, Pere Llimos Muntal, Gunnar Gudnason, Ivan Harald Holger Jørgensen

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

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Abstract

In this paper a trimless ultra-low-power voltage reference with low sensitivity to process, voltage and temperature (PVT) is presented. The design uses a cascaded proportional to absolute temperature (PTAT) voltage generator to produce a voltage independent of process and line variations. The voltage is compensated in temperature by using a temperature-dependent current-load that changes the bias point of the voltage generator. The voltage reference is simulated over PVT in a 28nm FD-SOI process and a mean value of 386mV with absolute accuracy of ±3.8% is found. Spread across process corners is 4.7% (3σ/µ). Power consumption is 36nW at 25◦C and 0.8V. Line sensitivity is better than 0.14%/V and the worst temperature coefficient (T.C.) from 0◦C to 60◦C is 91.8ppm/◦C.
Original languageEnglish
Title of host publicationProceedings of 2019 IEEE Nordic Circuits and Systems Conference
Number of pages5
PublisherIEEE
Publication statusAccepted/In press - 2019
Event2019 IEEE Nordic Circuits and Systems Conference - Helsinki, Finland
Duration: 29 Oct 201930 Oct 2019
https://events.tuni.fi/norcas2019/

Conference

Conference2019 IEEE Nordic Circuits and Systems Conference
CountryFinland
CityHelsinki
Period29/10/201930/10/2019
Internet address

Cite this

Maxsen, C., Llimos Muntal, P., Gudnason, G., & Jørgensen, I. H. H. (Accepted/In press). A 36 nW trimless voltage reference with low sensitivity to PVT variations. In Proceedings of 2019 IEEE Nordic Circuits and Systems Conference IEEE.
Maxsen, Calvin ; Llimos Muntal, Pere ; Gudnason, Gunnar ; Jørgensen, Ivan Harald Holger. / A 36 nW trimless voltage reference with low sensitivity to PVT variations. Proceedings of 2019 IEEE Nordic Circuits and Systems Conference. IEEE, 2019.
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title = "A 36 nW trimless voltage reference with low sensitivity to PVT variations",
abstract = "In this paper a trimless ultra-low-power voltage reference with low sensitivity to process, voltage and temperature (PVT) is presented. The design uses a cascaded proportional to absolute temperature (PTAT) voltage generator to produce a voltage independent of process and line variations. The voltage is compensated in temperature by using a temperature-dependent current-load that changes the bias point of the voltage generator. The voltage reference is simulated over PVT in a 28nm FD-SOI process and a mean value of 386mV with absolute accuracy of ±3.8{\%} is found. Spread across process corners is 4.7{\%} (3σ/µ). Power consumption is 36nW at 25◦C and 0.8V. Line sensitivity is better than 0.14{\%}/V and the worst temperature coefficient (T.C.) from 0◦C to 60◦C is 91.8ppm/◦C.",
author = "Calvin Maxsen and {Llimos Muntal}, Pere and Gunnar Gudnason and J{\o}rgensen, {Ivan Harald Holger}",
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Maxsen, C, Llimos Muntal, P, Gudnason, G & Jørgensen, IHH 2019, A 36 nW trimless voltage reference with low sensitivity to PVT variations. in Proceedings of 2019 IEEE Nordic Circuits and Systems Conference. IEEE, 2019 IEEE Nordic Circuits and Systems Conference, Helsinki, Finland, 29/10/2019.

A 36 nW trimless voltage reference with low sensitivity to PVT variations. / Maxsen, Calvin; Llimos Muntal, Pere; Gudnason, Gunnar; Jørgensen, Ivan Harald Holger.

Proceedings of 2019 IEEE Nordic Circuits and Systems Conference. IEEE, 2019.

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

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N2 - In this paper a trimless ultra-low-power voltage reference with low sensitivity to process, voltage and temperature (PVT) is presented. The design uses a cascaded proportional to absolute temperature (PTAT) voltage generator to produce a voltage independent of process and line variations. The voltage is compensated in temperature by using a temperature-dependent current-load that changes the bias point of the voltage generator. The voltage reference is simulated over PVT in a 28nm FD-SOI process and a mean value of 386mV with absolute accuracy of ±3.8% is found. Spread across process corners is 4.7% (3σ/µ). Power consumption is 36nW at 25◦C and 0.8V. Line sensitivity is better than 0.14%/V and the worst temperature coefficient (T.C.) from 0◦C to 60◦C is 91.8ppm/◦C.

AB - In this paper a trimless ultra-low-power voltage reference with low sensitivity to process, voltage and temperature (PVT) is presented. The design uses a cascaded proportional to absolute temperature (PTAT) voltage generator to produce a voltage independent of process and line variations. The voltage is compensated in temperature by using a temperature-dependent current-load that changes the bias point of the voltage generator. The voltage reference is simulated over PVT in a 28nm FD-SOI process and a mean value of 386mV with absolute accuracy of ±3.8% is found. Spread across process corners is 4.7% (3σ/µ). Power consumption is 36nW at 25◦C and 0.8V. Line sensitivity is better than 0.14%/V and the worst temperature coefficient (T.C.) from 0◦C to 60◦C is 91.8ppm/◦C.

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Maxsen C, Llimos Muntal P, Gudnason G, Jørgensen IHH. A 36 nW trimless voltage reference with low sensitivity to PVT variations. In Proceedings of 2019 IEEE Nordic Circuits and Systems Conference. IEEE. 2019