A 2GHz, 17% tuning range quadrature CMOS VCO with high figure–of–merit and 0.6° phase error

Pietro Andreani

    Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

    388 Downloads (Pure)


    This paper presents a quadrature VCO implemented in a standard 0.35µm CMOS process. The VCO draws 16mA from a 1.3V power supply, can be tuned between 1.91 GHz and 2.27GHz, and displays a phase noise of -140dBc/Hz or less at 3MHz offset frequency from the carrier, for a minimum phase-noise figure-of-merit of 184 dB. The maximum departure from quadrature between the VCO phases is 0.6°.
    Original languageEnglish
    Title of host publicationProceedings of the 28th European Solid-State Circuits Conference, 2002. ESSCIRC 2002.
    Publication date2002
    Publication statusPublished - 2002
    Event28th European Solid-State Circuits Conference - Florence, Italy
    Duration: 24 Sept 200226 Sept 2002
    Conference number: 28


    Conference28th European Solid-State Circuits Conference
    Internet address

    Bibliographical note

    Copyright: 2002 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE


    Dive into the research topics of 'A 2GHz, 17% tuning range quadrature CMOS VCO with high figure–of–merit and 0.6° phase error'. Together they form a unique fingerprint.

    Cite this