A 2GHz, 17% tuning range quadrature CMOS VCO with high figure–of–merit and 0.6° phase error

Pietro Andreani

A 2GHz, 17% tuning range quadrature CMOS VCO with high figure–of–merit and 0.6° phase error

Pietro Andreani

Research output: Chapter in Book/Report/Conference proceeding › Article in proceedings › Research › peer-review

437 Downloads (Pure)

Abstract

This paper presents a quadrature VCO implemented in a standard 0.35µm CMOS process. The VCO draws 16mA from a 1.3V power supply, can be tuned between 1.91 GHz and 2.27GHz, and displays a phase noise of -140dBc/Hz or less at 3MHz offset frequency from the carrier, for a minimum phase-noise figure-of-merit of 184 dB. The maximum departure from quadrature between the VCO phases is 0.6°.

Original language	English
Title of host publication	Proceedings of the 28th European Solid-State Circuits Conference, 2002. ESSCIRC 2002.
Publisher	IEEE
Publication date	2002
Publication status	Published - 2002
Event	28th European Solid-State Circuits Conference - Florence, Italy Duration: 24 Sept 2002 → 26 Sept 2002 Conference number: 28 http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=9921

Conference

Conference	28th European Solid-State Circuits Conference
Number	28
Country/Territory	Italy
City	Florence
Period	24/09/2002 → 26/09/2002
Internet address	http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=9921

Bibliographical note

Copyright: 2002 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE

Access to Document

AndreaniFinal published version, 215 KB

OpenUrl availability

Full text

Cite this

@inproceedings{e0a9c82154db4a66b111d6d8819027b4,

title = "A 2GHz, 17% tuning range quadrature CMOS VCO with high figure–of–merit and 0.6° phase error",

abstract = "This paper presents a quadrature VCO implemented in a standard 0.35µm CMOS process. The VCO draws 16mA from a 1.3V power supply, can be tuned between 1.91 GHz and 2.27GHz, and displays a phase noise of -140dBc/Hz or less at 3MHz offset frequency from the carrier, for a minimum phase-noise figure-of-merit of 184 dB. The maximum departure from quadrature between the VCO phases is 0.6°.",

author = "Pietro Andreani",

note = "Copyright: 2002 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE; 28th European Solid-State Circuits Conference, ESSCIRC 2002. ; Conference date: 24-09-2002 Through 26-09-2002",

year = "2002",

language = "English",

booktitle = "Proceedings of the 28th European Solid-State Circuits Conference, 2002. ESSCIRC 2002.",

publisher = "IEEE",

address = "United States",

url = "http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=9921",

}

TY - GEN

T1 - A 2GHz, 17% tuning range quadrature CMOS VCO with high figure–of–merit and 0.6° phase error

AU - Andreani, Pietro

N1 - Conference code: 28

PY - 2002

Y1 - 2002

N2 - This paper presents a quadrature VCO implemented in a standard 0.35µm CMOS process. The VCO draws 16mA from a 1.3V power supply, can be tuned between 1.91 GHz and 2.27GHz, and displays a phase noise of -140dBc/Hz or less at 3MHz offset frequency from the carrier, for a minimum phase-noise figure-of-merit of 184 dB. The maximum departure from quadrature between the VCO phases is 0.6°.

AB - This paper presents a quadrature VCO implemented in a standard 0.35µm CMOS process. The VCO draws 16mA from a 1.3V power supply, can be tuned between 1.91 GHz and 2.27GHz, and displays a phase noise of -140dBc/Hz or less at 3MHz offset frequency from the carrier, for a minimum phase-noise figure-of-merit of 184 dB. The maximum departure from quadrature between the VCO phases is 0.6°.

M3 - Article in proceedings

BT - Proceedings of the 28th European Solid-State Circuits Conference, 2002. ESSCIRC 2002.

PB - IEEE

T2 - 28th European Solid-State Circuits Conference

Y2 - 24 September 2002 through 26 September 2002

ER -

A 2GHz, 17% tuning range quadrature CMOS VCO with high figure–of–merit and 0.6° phase error

Abstract

Conference

Bibliographical note

Access to Document

OpenUrl availability

Fingerprint

Cite this