Abstract
This paper describes the design and implementation of a high speed GaAs ATM Mux Demur ASIC (AMDA) which is the key element in a high speed ATM Add-Drop unit. This unit is used in a new distributed ATM multiplexing-demultiplexing architecture for broadband switching systems. The Add-Drop unit provides a cell based interface between networks/systems operating at different data rates, the high speed interface being 2.5 Gb/s and the low speed interface being 155/622 Mb/s. Self-timed FIFOs are used for handling the speed gaps between domains operating at different clock rates, and a Self-Timed At Receiver's Input (STARI) interface is used at all high speed chip-to-chip links to eliminate timing skews The AMDA demonstrated operation above 4 Gb/s (500 MHz clock frequency) with an associated power dissipation of 5 W
Original language | English |
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Title of host publication | Technical Digest of the 17th Annual IEEE Gallium Arsenide Integrated Circuit Symposium |
Publisher | IEEE |
Publication date | 1995 |
Pages | 43-46 |
ISBN (Print) | 07-80-32966-X |
DOIs | |
Publication status | Published - 1995 |
Event | 17th Annual IEEE Gallium Arsenide Integrated Circuit Symposium - San Diego, CA, United States Duration: 28 Oct 1995 → 1 Nov 1995 Conference number: 17 http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=4051 |
Conference
Conference | 17th Annual IEEE Gallium Arsenide Integrated Circuit Symposium |
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Number | 17 |
Country/Territory | United States |
City | San Diego, CA |
Period | 28/10/1995 → 01/11/1995 |
Internet address |