Abstract
A two-stage amplifier, operational at 0.8V and drawing 7μA, has been integrated in a standard digital 0.18μm CMOS process. Rail-to-rail operations at the input are enabled by complementary transistor pairs with gm control. The efficient rail-to-rail output stage is biased in class AB. The measured DC gain of the amplifier is 75dB, and the unity-gain frequency is 870kHz with a 12pF, 100kΩload. Both input and output stage transistors are biased in weak inversion.
Original language | English |
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Title of host publication | 23rd NORCHIP Conference, 2005. |
Publisher | IEEE |
Publication date | 2005 |
ISBN (Print) | 1-4244-0064-3 |
DOIs | |
Publication status | Published - 2005 |
Event | 2005 IEEE 23rd NORCHIP Conference - Oulu, Finland Duration: 21 Nov 2005 → 22 Nov 2005 https://ieeexplore.ieee.org/xpl/conhome/10643/proceeding |
Conference
Conference | 2005 IEEE 23rd NORCHIP Conference |
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Country/Territory | Finland |
City | Oulu |
Period | 21/11/2005 → 22/11/2005 |
Internet address |