This paper presents a 90 nm CMOS ΣΔ A/D modulator operating with a supply voltage of 0.2 V, well below the threshold voltage of the transistors. The modulator is an open-loop first-order architecture based on a frequency-modulated intermediate signal, generated in a ring voltage-controlled oscillator. The linearity of the modulator is greatly improved by the adoption of a so-called soft-rail in the oscillator. Measurements show a dynamic range of 52 dB over a 20 kHz signal bandwidth with a sampling frequency of 3.4 MHz, for a total power consumption as low as 0.44 μW. The corresponding peak SNDR is 44.2 dB, while the peak SNR is 47.4 dB.
|Title of host publication||Proceedings of the 32nd European Solid-State Circuits Conference, 2006. ESSCIRC 2006.|
|Publication status||Published - 2006|
|Event||The 32nd European Solid-State Circuits Conference - Montreux, Switzerland|
Duration: 18 Sep 2006 → 22 Sep 2006
|Conference||The 32nd European Solid-State Circuits Conference|
|Period||18/09/2006 → 22/09/2006|