Abstract
High speed time-division multiplexers and demultiplexers are important components of modern optical communication systems. They are needed to parallelize the data to allow most of the system to operate at much lower speeds. This paper describes a 16:1 multiplexer and a 1:16 demultiplexer implemented on one IC in a 1.2 μm BiCMOS process. The IC combines fast ECL circuits with CMOS circuits, demonstrating that by utilizing the combination of bipolar and MOS transistors, a VLSI circuit with very high speed interface is feasible
Original language | English |
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Title of host publication | Proceedings of the IEEE International Symposium on Circuits and Systems |
Volume | Volume 4 |
Publisher | IEEE |
Publication date | 1994 |
Pages | 43-46 |
ISBN (Print) | 07-80-31915-X |
DOIs | |
Publication status | Published - 1994 |
Event | 1994 IEEE International Symposium on Circuits and Systems - London, United Kingdom Duration: 30 May 1994 → 2 Jun 1994 http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=3224 |
Conference
Conference | 1994 IEEE International Symposium on Circuits and Systems |
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Country/Territory | United Kingdom |
City | London |
Period | 30/05/1994 → 02/06/1994 |
Internet address |