1/f Noise Characterization in CMOS Transistors in 0.13μm Technology

J. Citakovic; L J Stenberg; Pietro Andreani

doi:10.1109/NORCHP.2006.329249

1/f Noise Characterization in CMOS Transistors in 0.13μm Technology

J. Citakovic, L J Stenberg, Pietro Andreani

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Abstract

Low-frequency noise has been studied on a set of n- and p-channel CMOS transistors fabricated in a 0.13μm technology. Noise measurements have been performed on transistors with different gate lengths operating under wide bias conditions, ranging from weak to strong inversion. Noise origin has been identified for both type of devices, and the oxide trap density Nt, the Hooge parameter αH and the Coulomb scattering parameter αs have been extracted. The experimental results are compared with simulations using the BSIM3v3 MOS model.

Original language	English
Title of host publication	24th Norchip Conference, 2006.
Publisher	IEEE
Publication date	2006
Pages	81-84
ISBN (Print)	1-4244-0772-9
DOIs	https://doi.org/10.1109/NORCHP.2006.329249
Publication status	Published - 2006
Event	2006 IEEE 24th NORCHIP Conference - Linköping, Sweden Duration: 20 Nov 2006 → 21 Nov 2006 Conference number: 24 https://ieeexplore.ieee.org/xpl/conhome/4126933/proceeding

Conference

Conference	2006 IEEE 24th NORCHIP Conference
Number	24
Country/Territory	Sweden
City	Linköping
Period	20/11/2006 → 21/11/2006
Internet address	https://ieeexplore.ieee.org/xpl/conhome/4126933/proceeding

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Copyright: 2006 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE

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@inproceedings{aea1686303254f2ab062363633bffb1b,

title = "1/f Noise Characterization in CMOS Transistors in 0.13μm Technology",

abstract = "Low-frequency noise has been studied on a set of n- and p-channel CMOS transistors fabricated in a 0.13μm technology. Noise measurements have been performed on transistors with different gate lengths operating under wide bias conditions, ranging from weak to strong inversion. Noise origin has been identified for both type of devices, and the oxide trap density Nt, the Hooge parameter αH and the Coulomb scattering parameter αs have been extracted. The experimental results are compared with simulations using the BSIM3v3 MOS model.",

author = "J. Citakovic and Stenberg, {L J} and Pietro Andreani",

note = "Copyright: 2006 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE; 2006 IEEE 24th NORCHIP Conference ; Conference date: 20-11-2006 Through 21-11-2006",

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doi = "10.1109/NORCHP.2006.329249",

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isbn = "1-4244-0772-9",

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AU - Stenberg, L J

AU - Andreani, Pietro

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PY - 2006

Y1 - 2006

N2 - Low-frequency noise has been studied on a set of n- and p-channel CMOS transistors fabricated in a 0.13μm technology. Noise measurements have been performed on transistors with different gate lengths operating under wide bias conditions, ranging from weak to strong inversion. Noise origin has been identified for both type of devices, and the oxide trap density Nt, the Hooge parameter αH and the Coulomb scattering parameter αs have been extracted. The experimental results are compared with simulations using the BSIM3v3 MOS model.

AB - Low-frequency noise has been studied on a set of n- and p-channel CMOS transistors fabricated in a 0.13μm technology. Noise measurements have been performed on transistors with different gate lengths operating under wide bias conditions, ranging from weak to strong inversion. Noise origin has been identified for both type of devices, and the oxide trap density Nt, the Hooge parameter αH and the Coulomb scattering parameter αs have been extracted. The experimental results are compared with simulations using the BSIM3v3 MOS model.

U2 - 10.1109/NORCHP.2006.329249

DO - 10.1109/NORCHP.2006.329249

M3 - Article in proceedings

SN - 1-4244-0772-9

SP - 81

EP - 84

BT - 24th Norchip Conference, 2006.

PB - IEEE

T2 - 2006 IEEE 24th NORCHIP Conference

Y2 - 20 November 2006 through 21 November 2006

ER -

1/f Noise Characterization in CMOS Transistors in 0.13μm Technology

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