VLSI kredsløb til analog signalbehandling i forbindelse med intelligente transducere.

  • Fürst, Claus Erdmann (PhD Student)
  • Hansen, Ole (Examiner)
  • Helwigh, Hans Eggert (Examiner)
  • Bruun, Erik (Main Supervisor)
  • Nielsen, Peter Østergaard (Examiner)

Project Details

StatusFinished
Effective start/end date01/07/199309/09/1997