SOI-CMOS Process

We have developed a SOI-CMOS process based on a commercially available Silicon on Insulator on Silicon (SOI) substrate. An SOI-CMOS process yields very high performance MOS devices with significantly reduced parasitics compared to bulk CMOS devices.
The improved device performance is realized in spite of a significant reduction in the number of processing steps needed for fabrication. This makes SOI-CMOS processes a strong candidate for monolithic smart sensors, where improved system yield can be expected due to the decrease in complexity of the fabrication process. We have finished two successful runs of the process. In 1997 the process will be further optimized to include more metal layers and a possible integration of electroplated metallic microstructures for smart sensor purposes.