• Richard Petersens Plads, 322, 130

    2800 Kgs. Lyngby

    Denmark

20012020

Research output per year

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Research Output

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Article in proceedings
2020

Approximated Canonical Signed Digit for Error Resilient Intelligent Computation

Cardarilli, G. C., Di Nunzio, L., Fazzolari, R., Nannarelli, A. & Re, M., 2020, (Accepted/In press) Proceedings of 53rd Asilomar Conference on Signals, Systems, and Computers. IEEE, 5 p.

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Open Access
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14 Downloads (Pure)
2019

A Power Efficient Digital Front-End for Cognitive Radio Systems

Cardarilli, G. C., Nunzio, L. D., Fazzolari, R., Nannarelli, A. & Re, M., 2019, Proceedings of the 2018 52nd Asilomar Conference on Signals, Systems, and Computers. Matthews, M. B. (ed.). IEEE Computer Society Press, p. 199-202 4 p. 8645514. (Conference Record - Asilomar Conference on Signals, Systems and Computers, Vol. 2018-October).

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Digital Signal Processing Accelerator for RISC-V

Calicchia, L., Ciotoli, V., Cardarilli, G. C., Di Nunzio, L., Fazzolari, R. & Nannarelli, A., 2019, Proceedings of 26th IEEE International Conference on Electronics Circuits and Systems. IEEE, 4 p.

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Open Access
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47 Downloads (Pure)
2018

Digital Architecture and ASIC Implementation of Wideband Delta DOR Spacecraft Onboard Tracker

Cardarilli, G. C., Di Nunzio, L., Fazzolari, R., Gelfusa, D., Matta, M., Nannarelli, A., Re, M., Simone, L. & Spano, S., 13 Aug 2018, Proceedings of 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. IEEE, p. 17-20

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Tunable Floating-Point for Artificial Neural Networks

Franceschi, M., Nannarelli, A. & Valle, M., 2018, Proceedings of 25th IEEE International Conference on Electronics Circuits and Systems. IEEE, p. 289-292

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

File
164 Downloads (Pure)

Tunable Floating-Point for Embedded Machine Learning Algorithms Implementation

Franceschi, M., Nannarelli, A. & Valle, M., 2018, Proceedings of 2018 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. IEEE, p. 89-92

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Tunable Floating-Point for Energy Efficient Accelerators

Nannarelli, A., 2018, Proceedings of 2018 IEEE 25th Symposium on Computer Arithmetic. IEEE, p. 29-36

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

2017

A Multi-Format Floating-Point Multiplier for Power-Efficient Operations

Nannarelli, A., 2017, Proceedings of the 30th IEEE International System-on-Chip Conference. IEEE, p. 351-356

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Open Access
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191 Downloads (Pure)

Robust Throughput Boosting for Low Latency Dynamic Partial Reconfiguration

Nannarelli, A., Re, M., Cardarilli, G. C., Nunzio, L. D., Brunella, M. S., Fazzolari, R. & Carbonari, F., 2017, Proceedins of the 30th IEEE International System-on-Chip Conference. IEEE, p. 86-90 5 p.

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Open Access
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172 Downloads (Pure)
2016

A Framework for Dynamically-Loaded Hardware Library (HLL) in FPGA Acceleration

Cardarilli, G. C., Di Carlo, L., Nannarelli, A., Pandolfi, F. M. & Re, M., 2016, Proceedings of the 15th IEEE International Symposium on Signal Processing and Information Technology (ISSPIT 2015). IEEE, p. 291-296

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Open Access
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319 Downloads (Pure)

A Hardware Framework for on-Chip FPGA Acceleration

Lomuscio, A., Cardarilli, G. C., Nannarelli, A. & Re, M., 2016, Proceedings of the 15th International Symposium on Integrated Circuits (ISIC 2016). IEEE, 4 p.

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Design and Simulation of a Quaternary Memory Cell based on a Physical Memristor

Nannarelli, A. & Taylor, J., 2016, Proceedings of the 2016 IEEE Nordic Circuits and Systems Conference (NorCAS). IEEE, 6 p.

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Open Access
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235 Downloads (Pure)

Dynamically-Loaded Hardware Libraries (HLL) Technology for Audio Applications

Esposito, A., Lomuscio, A., Nunzio, L. D., Fazzolari, R., Nannarelli, A. & Re, M., 2016, Proceedings of the 50 th Annual Asilomar Conference on Signals, Systems, and Computers. IEEE, p. 882-886

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

2015

Characterization of RNS multiply-add units for power efficient DSP

Cardarilli, G. C., Nannarelli, A., Petricca, M. & Re, M., 2015, Conference Proceedings of the 58th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS 2015): “Climbing to New Heights”. IEEE, 4 p.

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Reliability in Warehouse-Scale Computing: Why Low Latency Matters

Nannarelli, A., 2015, Proceedings of MEDIAN Finale - Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale. p. 2-6

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Open Access
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83 Downloads (Pure)
2014

Decimal Engine for Energy-Efficient Multicore Processors

Nannarelli, A., 2014, Proceedings of the 22nd IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC). IEEE, 6 p.

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Energy Efficient FPGA based Hardware Accelerators for Financial Applications

Kenn Toft, J. & Nannarelli, A., 2014, Proceedings of 32nd NORCHIP Conference. IEEE, 6 p.

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

File
677 Downloads (Pure)

Twenty Years of Research on RNS for DSP: Lessons Learned and Future Perspectives

Albicocco, P., Cardarilli, G. C., Nannarelli, A. & Re, M., 2014, Proceedings of the 14th International Symposium on Integrated Circuits (ISIC 2014). IEEE, p. 436-439

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

File
165 Downloads (Pure)
2013

Truncated multipliers through power-gating for degrading precision arithmetic

Albicocco, P., Cardarilli, G. C., Nannarelli, A., Petricca, M. & Re, M., 2013, Proceedings of 2013 Asilomar Conference on Signals, Systems and Computers. IEEE, p. 2172-2176

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

2012

Design of Power Efficient FPGA based Hardware Accelerators for Financial Applications

Hegner, J. S., Sindholt, J. & Nannarelli, A., 2012, 2012 NORCHIP. IEEE, 4 p.

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

File
771 Downloads (Pure)

Imprecise Arithmetic for Low Power Image Processing

Albicocco, P., Cardarilli, G. C., Nannarelli, A., Petricca, M. & Re, M., 2012, 2012 Conference Record of the Forty Sixth Asilomar Conference on Signals, Systems and Computers (ASILOMAR). IEEE, p. 983-987 (Asilomar Conference on Signals, Systems and Computers. Conference Record).

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

File
255 Downloads (Pure)

Power and Aging Characterization of Digital FIR Filters Architectures

Calimera, A., Liu, W., Macii, E., Nannarelli, A. & Poncino, M., 2012, First MEDIAN Workshop 2012. 6 p.

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Open Access
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144 Downloads (Pure)

Power Efficient Design of Parallel/Serial FIR Filters in RNS

Petricca, M., Albicocco, P., Cardarilli, G. C., Nannarelli, A. & Re, M., 2012, 2012 Conference Record of the Forty Sixth Asilomar Conference on Signals, Systems and Computers (ASILOMAR). IEEE, p. 1015-1019 (Asilomar Conference on Signals, Systems and Computers. Conference Record).

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

File
303 Downloads (Pure)
2011

Degrading Precision Arithmetics for Low-power FIR Implementation

Albicocco, P., Cardarilli, G. C., Nannarelli, A., Petricca, M. & Re, M., 2011, 2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS). IEEE, (Midwest Symposium on Circuits and Systems. Conference Proceedings).

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

FPGA Based Acceleration of Decimal Operations

Nannarelli, A., 2011, Proceedings of 2011 International Conference on ReConFigurable Computing and FPGA's. IEEE, p. 146-151

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

FPGA Implementation of Decimal Processors for Hardware Acceleration

Borup, N., Dindorp, J. & Nannarelli, A., 2011, Proceedings of NORCHIP 2011. IEEE

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

File
245 Downloads (Pure)

Radix-16 Combined Division and Square Root Unit

Nannarelli, A., 2011, 2011 20th IEEE Symposium on Computer Arithmetic (ARITH). IEEE, p. 169-176 (Proceedings of the Symposium on Computer Arithmetic).

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Temperature Dependent Wire Delay Estimation in Floorplanning

Winther, A. T., Liu, W., Nannarelli, A. & Vrudhula, S., 2011, Proceedings of NORCHIP 2011.

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

File
165 Downloads (Pure)
2010

Degrading Precision Arithmetic for Low Power Signal Processing

Petricca, M., Cardarilli, G. C., Nannarelli, A., Re, M. & Albicocco, P., 2010, Proc. of 44th Asilomar Conference on Signals, Systems and Computers.

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Design of Large Polyphase Filters in the Quadratic Residue Number System

Cardarilli, G. C., Nannarelli, A., Oster, Y., Petricca, M. & Re, M., 2010, Proc. of 44th Asilomar Conference on Signals, Systems and Computers.

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Post-placement temperature reduction techniques

Liu, W. & Nannarelli, A., 2010, Design, Automation & Test in Europe Conference & Exhibition (DATE), 2010. IEEE, p. 634-637

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Open Access
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107 Downloads (Pure)

Power Dissipation Challenges in Multicore Floating-Point Units

Liu, W. & Nannarelli, A., 2010, Proceedings of 21st IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2010). IEEE, p. 257-264

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Temperature Aware Power Optimization for Multicore Floating-Point Units

Liu, W. & Nannarelli, A., 2010, Proc. of 44th Asilomar Conference on Signals, Systems and Computers.

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

2009

Division Unit for Binary Integer Decimals

Lang, T. & Nannarelli, A., 2009, Proceedings of 20th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP '09). IEEE, p. 1-7

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Hardware Implementation of Real-Time MPEG Analysis and Deblocking for Video Enhancement

Petricca, M., Li, H., Forchhammer, S., Nannarelli, A., Re, M., Andersen, J. D. & Cardarilli, G. C., 2009, Proc. of 43rd Asilomar Conference on Signals, Systems and Computers.

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Multiple Constant Multiplication through Residue Number System

Shuli, I., Petricca, M., Cardarilli, G. C., Nannarelli, A. & Re, M., 2009, Proc. of 43rd Asilomar Conference on Signals, Systems and Computers.

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Thermal Modeling Based on SPICE Simulation

Liu, W., Calimera, A., Nannarelli, A., Macii, E. & Poncino, M., 2009, Proc. of 19th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS).

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

2008

ADAPTO: Full-Adder Based Reconfigurable Architecture for Bit Level Operations

Cardarilli, G. C., Di Nunzio, L., Nannarelli, A. & Re, M., 2008, 2008 IEEE International Symposium on Circuits and Systems. IEEE, p. 3434-3437

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

A Variant of a Radix-10 Combinational Multiplier

Dadda, L. & Nannarelli, A., 2008, 2008 IEEE International Symposium on Circuits and Systems. IEEE, p. 3370-3373

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Net Balanced Floorplanning Based on Elastic Energy Model

Liu, W. & Nannarelli, A., 2008, 2008 NORCHIP. IEEE

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Open Access
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152 Downloads (Pure)

On the Comparison of Different Number Systems in the Implementation of Complex FIR Filters

Cardarilli, G. C., Nannarelli, A. & Re, M., 2008, Proc. of 16th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC). IEEE, p. 37-41

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Power Dissipation in Division

Liu, W. & Nannarelli, A., 2008, Proceedings of 42nd Asilomar Conference on Signals, Systems, and Computers. IEEE Signal Processing Society

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Open Access
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201 Downloads (Pure)

Reducing Power Dissipation in Pipelined Accumulators

Cardarilli, G. C., Nannarelli, A. & Re, M., 2008, Proceedings of 42nd Asilomar Conference on Signals, Systems, and Computers. IEEE Signal Processing Society

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearch

2007

Combined Radix-10 and Radix-16 Division Unit

Lang, T. & Nannarelli, A., 2007, Proc. of 41st Asilomar Conference on Signals, Systems, and Computers.

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Impact of RNS Coding Overhead on FIR Filters Performance

Cardarilli, G. C., Del Re, A., Nannarelli, A. & Re, M., 2007, Proc. of 41st Asilomar Conference on Signals, Systems, and Computers.

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Low-power adaptive filter based on RNS components

Bernocchi, G. L., Cardarilli, G. C., Del Re, A., Nannarelli, A. & Re, M., 2007, Proc. of 2007 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, p. 3211-3214

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Residue Number System for Low Power DSP Applications

Cardarilli, G. C., Nannarelli, A. & Re, M., 2007, Proc. of 41st Asilomar Conference on Signals, Systems, and Computers.

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

2006

A 1.5 GFLOPS Reciprocal Unit for Computer Graphics

Nannarelli, A., Rasmussen, M. S. & Stuart, M. B., 2006, Proceedings of 40th Asilomar Conference on Signals, Systems, and Computers. IEEE, p. 1682-1686

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Open Access
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77 Downloads (Pure)

A hybrid RNS adaptive filter for channel equalization

Bernocchi, G. L., Cardarilli, G. C., Re, A. D., Nannarelli, A. & Re, M., 2006, Proc. of 40th Asilomar Conference on Signals, Systems, and Computers. p. 1706-1710

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Open Access
File
194 Downloads (Pure)

A Radix-10 Combinational Multiplier

Lang, T. & Nannarelli, A., 2006, Proceedings of 40th Asilomar Conference on Signals, Systems, and Computers. IEEE, p. 313-317

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Open Access
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132 Downloads (Pure)