Wireless sensor networks are networked embedded computer systems with stringent power, performance, cost and form-factor requirements along with numerous other constraints related to their pervasiveness and ubiquitousness. Therefore, only a systematic design methdology coupled with an efficient test approach can enable their conformance to design and deployment specifications. We discuss off-line, hierarchical, functional testing of complete wireless sensor nodes containing configurable logic through a combination of FPGA-based board test and Software-Based Self-Test (SBST) techniques. The proposed functional test methodology has been applied to a COTS-based sensor node development platform and can be applied, in general, for testing all types of wireless sensor node designs.