Behavioral synthesis of asynchronous circuits

Publication: ResearchPh.D. thesis – Annual report year: 2005

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Behavioral synthesis of asynchronous circuits. / Nielsen, Sune Fallgaard; Sparsø, Jens (Supervisor); Madsen, Jan (Supervisor).

2005. (IMM-PHD-2005-144).

Publication: ResearchPh.D. thesis – Annual report year: 2005

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Author

Nielsen, Sune Fallgaard; Sparsø, Jens (Supervisor); Madsen, Jan (Supervisor) / Behavioral synthesis of asynchronous circuits.

2005. (IMM-PHD-2005-144).

Publication: ResearchPh.D. thesis – Annual report year: 2005

Bibtex

@phdthesis{d0026636504f4f3c8660aed120f2fa8b,
title = "Behavioral synthesis of asynchronous circuits",
author = "Nielsen, {Sune Fallgaard} and Jens Sparsø and Jan Madsen",
year = "2005",

}

RIS

TY - BOOK

T1 - Behavioral synthesis of asynchronous circuits

AU - Nielsen,Sune Fallgaard

A2 - Sparsø,Jens

A2 - Madsen,Jan

PY - 2005

Y1 - 2005

N2 - This thesis presents a method for behavioral synthesis of asynchronous circuits, which aims at providing a synthesis flow which uses and tranfers methods from synchronous circuits to asynchronous circuits. We move the synchronous behavioral synthesis abstraction into the asynchronous handshake domain by introducing a computation model, which resembles the synchronous datapath and control architecture, but which is completely asynchronous. The model contains the possibility for isolating some or all of the functional units by locking their respective inputs and outputs while the functional unit is idle. This reduces unnecessary switching activity in the individual functional units and therefore the energy consumption of the entire circuit. A collection of behavioral synthesis algorithms have been developed allowing the designer to perform time and power constrained design space exploration. The datapath and control architecture is then expressed in the Balsa-language, and using syntax directed compilation a corresponding handshake circuit implementation (and eventually a layout) is produced.

AB - This thesis presents a method for behavioral synthesis of asynchronous circuits, which aims at providing a synthesis flow which uses and tranfers methods from synchronous circuits to asynchronous circuits. We move the synchronous behavioral synthesis abstraction into the asynchronous handshake domain by introducing a computation model, which resembles the synchronous datapath and control architecture, but which is completely asynchronous. The model contains the possibility for isolating some or all of the functional units by locking their respective inputs and outputs while the functional unit is idle. This reduces unnecessary switching activity in the individual functional units and therefore the energy consumption of the entire circuit. A collection of behavioral synthesis algorithms have been developed allowing the designer to perform time and power constrained design space exploration. The datapath and control architecture is then expressed in the Balsa-language, and using syntax directed compilation a corresponding handshake circuit implementation (and eventually a layout) is produced.

M3 - Ph.D. thesis

BT - Behavioral synthesis of asynchronous circuits

ER -